Collaboration diagram for ADC Private Macros:

Macros
#define	ADC_IS_ENABLE(__HANDLE__)
	Verification of ADC state: enabled or disabled.

#define	ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__)
	Test if conversion trigger of regular group is software start or external trigger.

#define	ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__)
	Test if conversion trigger of injected group is software start or external trigger.

#define	ADC_STATE_CLR_SET MODIFY_REG
	Simultaneously clears and sets specific bits of the handle State.

#define	ADC_CLEAR_ERRORCODE(__HANDLE__)
	Clear ADC error code (set it to error code: "no error")

#define	IS_ADC_CLOCKPRESCALER(ADC_CLOCK)

#define	IS_ADC_SAMPLING_DELAY(DELAY)

#define	IS_ADC_RESOLUTION(RESOLUTION)

#define	IS_ADC_EXT_TRIG_EDGE(EDGE)

#define	IS_ADC_EXT_TRIG(REGTRIG)

#define	IS_ADC_DATA_ALIGN(ALIGN)

#define	IS_ADC_SAMPLE_TIME(TIME)

#define	IS_ADC_EOCSelection(EOCSelection)

#define	IS_ADC_EVENT_TYPE(EVENT)

#define	IS_ADC_ANALOG_WATCHDOG(WATCHDOG)

#define	IS_ADC_CHANNELS_TYPE(CHANNEL_TYPE)

#define	IS_ADC_THRESHOLD(THRESHOLD)

#define	IS_ADC_REGULAR_LENGTH(LENGTH)

#define	IS_ADC_REGULAR_RANK(RANK)

#define	IS_ADC_REGULAR_DISC_NUMBER(NUMBER)

#define	IS_ADC_RANGE(RESOLUTION, ADC_VALUE)

#define	ADC_SQR1(_NbrOfConversion_)
	Set ADC Regular channel sequence length.

#define	ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_)
	Set the ADC's sample time for channel numbers between 10 and 18.

#define	ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_)
	Set the ADC's sample time for channel numbers between 0 and 9.

#define	ADC_SQR3_RK(_CHANNELNB_, _RANKNB_)
	Set the selected regular channel rank for rank between 1 and 6.

#define	ADC_SQR2_RK(_CHANNELNB_, _RANKNB_)
	Set the selected regular channel rank for rank between 7 and 12.

#define	ADC_SQR1_RK(_CHANNELNB_, _RANKNB_)
	Set the selected regular channel rank for rank between 13 and 16.

#define	ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_)
	Enable ADC continuous conversion mode.

#define	ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_)
	Configures the number of discontinuous conversions for the regular group channels.

#define	ADC_CR1_SCANCONV(_SCANCONV_MODE_)
	Enable ADC scan mode.

#define	ADC_CR2_EOCSelection(_EOCSelection_MODE_)
	Enable the ADC end of conversion selection.

#define	ADC_CR2_DMAContReq(_DMAContReq_MODE_)
	Enable the ADC DMA continuous request.

#define	ADC_GET_RESOLUTION(__HANDLE__)
	Return resolution bits in CR1 register.

Detailed Description

Macro Definition Documentation

◆ ADC_IS_ENABLE

#define ADC_IS_ENABLE ( __HANDLE__ )

#include <stm32f4xx_hal_adc.h>

Value:

((( ((__HANDLE__)->Instance->SR & ADC_SR_ADONS) == ADC_SR_ADONS ) \

) ? SET : RESET)

Verification of ADC state: enabled or disabled.

Parameters

__HANDLE__ ADC handle

Return values

SET	(ADC enabled) or RESET (ADC disabled)

Definition at line 661 of file stm32f4xx_hal_adc.h.

◆ ADC_IS_SOFTWARE_START_REGULAR

#define ADC_IS_SOFTWARE_START_REGULAR ( __HANDLE__ )

#include <stm32f4xx_hal_adc.h>

Value:

(((__HANDLE__)->Instance->CR2 & ADC_CR2_EXTEN) == RESET)

Test if conversion trigger of regular group is software start or external trigger.

Parameters

__HANDLE__ ADC handle

Return values

SET	(software start) or RESET (external trigger)

Definition at line 671 of file stm32f4xx_hal_adc.h.

Referenced by ADC_DMAConvCplt(), ADC_MultiModeDMAConvCplt(), HAL_ADC_IRQHandler(), HAL_ADC_PollForConversion(), and HAL_ADCEx_InjectedPollForConversion().

◆ ADC_IS_SOFTWARE_START_INJECTED

#define ADC_IS_SOFTWARE_START_INJECTED ( __HANDLE__ )

#include <stm32f4xx_hal_adc.h>

Value:

(((__HANDLE__)->Instance->CR2 & ADC_CR2_JEXTEN) == RESET)

Test if conversion trigger of injected group is software start or external trigger.

Parameters

__HANDLE__ ADC handle

Return values

SET	(software start) or RESET (external trigger)

Definition at line 680 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_IRQHandler(), and HAL_ADCEx_InjectedPollForConversion().

◆ ADC_STATE_CLR_SET

#define ADC_STATE_CLR_SET MODIFY_REG

#include <stm32f4xx_hal_adc.h>

Simultaneously clears and sets specific bits of the handle State.

Note: : ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), the first parameter is the ADC handle State, the second parameter is the bit field to clear, the third and last parameter is the bit field to set.

Return values

None

Definition at line 690 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init(), HAL_ADC_Start(), HAL_ADC_Start_DMA(), HAL_ADC_Start_IT(), HAL_ADC_Stop(), HAL_ADC_Stop_DMA(), HAL_ADC_Stop_IT(), HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT(), HAL_ADCEx_InjectedStop(), HAL_ADCEx_InjectedStop_IT(), HAL_ADCEx_MultiModeStart_DMA(), and HAL_ADCEx_MultiModeStop_DMA().

◆ ADC_CLEAR_ERRORCODE

#define ADC_CLEAR_ERRORCODE ( __HANDLE__ )

#include <stm32f4xx_hal_adc.h>

Value:

((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)

HAL_ADC_ERROR_NONE

#define HAL_ADC_ERROR_NONE

Definition stm32f4xx_hal_adc.h:256

Clear ADC error code (set it to error code: "no error")

Parameters

__HANDLE__ ADC handle

Return values

None

Definition at line 697 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_DeInit(), HAL_ADC_Init(), HAL_ADC_Start(), HAL_ADC_Start_DMA(), HAL_ADC_Start_IT(), HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT(), and HAL_ADCEx_MultiModeStart_DMA().

◆ IS_ADC_CLOCKPRESCALER

#define IS_ADC_CLOCKPRESCALER ( ADC_CLOCK )

#include <stm32f4xx_hal_adc.h>

Value:

                                              (((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
                                              ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) || \
                                              ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV6) || \
                                              ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV8))

Definition at line 701 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init().

◆ IS_ADC_SAMPLING_DELAY

#define IS_ADC_SAMPLING_DELAY ( DELAY )

#include <stm32f4xx_hal_adc.h>

Value:

                                      (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES)  || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES)  || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES)  || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES)  || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES)  || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
                                      ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))

Definition at line 705 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADCEx_MultiModeConfigChannel().

◆ IS_ADC_RESOLUTION

#define IS_ADC_RESOLUTION ( RESOLUTION )

#include <stm32f4xx_hal_adc.h>

Value:

                                       (((RESOLUTION) == ADC_RESOLUTION_12B) || \
                                       ((RESOLUTION) == ADC_RESOLUTION_10B) || \
                                       ((RESOLUTION) == ADC_RESOLUTION_8B)  || \
                                       ((RESOLUTION) == ADC_RESOLUTION_6B))

Definition at line 721 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init().

◆ IS_ADC_EXT_TRIG_EDGE

#define IS_ADC_EXT_TRIG_EDGE ( EDGE )

#include <stm32f4xx_hal_adc.h>

Value:

                                    (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE)    || \
                                    ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING)  || \
                                    ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
                                    ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))

Definition at line 725 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init(), HAL_ADC_Start(), HAL_ADC_Start_DMA(), HAL_ADC_Start_IT(), and HAL_ADCEx_MultiModeStart_DMA().

◆ IS_ADC_EXT_TRIG

#define IS_ADC_EXT_TRIG ( REGTRIG )

#include <stm32f4xx_hal_adc.h>

Value:

                                  (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC4)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC2)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)  || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_Ext_IT11)|| \
                                  ((REGTRIG) == ADC_SOFTWARE_START))

Definition at line 729 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init().

◆ IS_ADC_DATA_ALIGN

#define IS_ADC_DATA_ALIGN ( ALIGN )

#include <stm32f4xx_hal_adc.h>

Value:

(((ALIGN) == ADC_DATAALIGN_RIGHT) || \

((ALIGN) == ADC_DATAALIGN_LEFT))

ADC_DATAALIGN_LEFT

#define ADC_DATAALIGN_LEFT

Definition stm32f4xx_hal_adc.h:355

ADC_DATAALIGN_RIGHT

#define ADC_DATAALIGN_RIGHT

Definition stm32f4xx_hal_adc.h:354

Definition at line 746 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init().

◆ IS_ADC_SAMPLE_TIME

#define IS_ADC_SAMPLE_TIME ( TIME )

#include <stm32f4xx_hal_adc.h>

Value:

                                  (((TIME) == ADC_SAMPLETIME_3CYCLES)   || \
                                  ((TIME) == ADC_SAMPLETIME_15CYCLES)  || \
                                  ((TIME) == ADC_SAMPLETIME_28CYCLES)  || \
                                  ((TIME) == ADC_SAMPLETIME_56CYCLES)  || \
                                  ((TIME) == ADC_SAMPLETIME_84CYCLES)  || \
                                  ((TIME) == ADC_SAMPLETIME_112CYCLES) || \
                                  ((TIME) == ADC_SAMPLETIME_144CYCLES) || \
                                  ((TIME) == ADC_SAMPLETIME_480CYCLES))

Definition at line 748 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel(), and HAL_ADCEx_InjectedConfigChannel().

◆ IS_ADC_EOCSelection

#define IS_ADC_EOCSelection ( EOCSelection )

#include <stm32f4xx_hal_adc.h>

Value:

                                           (((EOCSelection) == ADC_EOC_SINGLE_CONV)   || \
                                           ((EOCSelection) == ADC_EOC_SEQ_CONV)  || \
                                           ((EOCSelection) == ADC_EOC_SINGLE_SEQ_CONV))

Definition at line 756 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init(), and HAL_ADC_IRQHandler().

◆ IS_ADC_EVENT_TYPE

#define IS_ADC_EVENT_TYPE ( EVENT )

#include <stm32f4xx_hal_adc.h>

Value:

(((EVENT) == ADC_AWD_EVENT) || \

((EVENT) == ADC_OVR_EVENT))

ADC_AWD_EVENT

#define ADC_AWD_EVENT

Definition stm32f4xx_hal_adc.h:417

ADC_OVR_EVENT

#define ADC_OVR_EVENT

Definition stm32f4xx_hal_adc.h:418

Definition at line 759 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_PollForEvent().

◆ IS_ADC_ANALOG_WATCHDOG

#define IS_ADC_ANALOG_WATCHDOG ( WATCHDOG )

#include <stm32f4xx_hal_adc.h>

Value:

                                          (((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG)        || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC)      || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)   || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG)           || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC)         || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC)      || \
                                          ((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE))

Definition at line 761 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_AnalogWDGConfig().

◆ IS_ADC_CHANNELS_TYPE

#define IS_ADC_CHANNELS_TYPE ( CHANNEL_TYPE )

#include <stm32f4xx_hal_adc.h>

Value:

                                            (((CHANNEL_TYPE) == ADC_ALL_CHANNELS) || \
                                            ((CHANNEL_TYPE) == ADC_REGULAR_CHANNELS) || \
                                            ((CHANNEL_TYPE) == ADC_INJECTED_CHANNELS))

Definition at line 768 of file stm32f4xx_hal_adc.h.

◆ IS_ADC_THRESHOLD

#define IS_ADC_THRESHOLD ( THRESHOLD )

#include <stm32f4xx_hal_adc.h>

Value:

((THRESHOLD) <= 0xFFFU)

Definition at line 771 of file stm32f4xx_hal_adc.h.

◆ IS_ADC_REGULAR_LENGTH

#define IS_ADC_REGULAR_LENGTH ( LENGTH )

#include <stm32f4xx_hal_adc.h>

Value:

(((LENGTH) >= 1U) && ((LENGTH) <= 16U))

Definition at line 773 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_Init(), and HAL_ADC_IRQHandler().

◆ IS_ADC_REGULAR_RANK

#define IS_ADC_REGULAR_RANK ( RANK )

#include <stm32f4xx_hal_adc.h>

Value:

(((RANK) >= 1U) && ((RANK) <= (16U)))

Definition at line 774 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel().

◆ IS_ADC_REGULAR_DISC_NUMBER

#define IS_ADC_REGULAR_DISC_NUMBER ( NUMBER )

#include <stm32f4xx_hal_adc.h>

Value:

(((NUMBER) >= 1U) && ((NUMBER) <= 8U))

Definition at line 775 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ IS_ADC_RANGE

#define IS_ADC_RANGE	(		RESOLUTION,
			ADC_VALUE )

#include <stm32f4xx_hal_adc.h>

Value:

   ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= 0x0FFFU)) || \
    (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= 0x03FFU)) || \
    (((RESOLUTION) == ADC_RESOLUTION_8B)  && ((ADC_VALUE) <= 0x00FFU)) || \
    (((RESOLUTION) == ADC_RESOLUTION_6B)  && ((ADC_VALUE) <= 0x003FU)))

Definition at line 776 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_AnalogWDGConfig(), and HAL_ADCEx_InjectedConfigChannel().

◆ ADC_SQR1

#define ADC_SQR1 ( _NbrOfConversion_ )

#include <stm32f4xx_hal_adc.h>

Value:

(((_NbrOfConversion_) - (uint8_t)1U) << 20U)

Set ADC Regular channel sequence length.

Parameters

_NbrOfConversion_ Regular channel sequence length.

Return values

None

Definition at line 787 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init(), and HAL_ADCEx_InjectedConfigChannel().

◆ ADC_SMPR1

#define ADC_SMPR1	(		_SAMPLETIME_,
			_CHANNELNB_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))

Set the ADC's sample time for channel numbers between 10 and 18.

Parameters

_SAMPLETIME_	Sample time parameter.
_CHANNELNB_	Channel number.

Return values

None

Definition at line 795 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel(), and HAL_ADCEx_InjectedConfigChannel().

◆ ADC_SMPR2

#define ADC_SMPR2	(		_SAMPLETIME_,
			_CHANNELNB_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))

Set the ADC's sample time for channel numbers between 0 and 9.

Parameters

_SAMPLETIME_	Sample time parameter.
_CHANNELNB_	Channel number.

Return values

None

Definition at line 803 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel(), and HAL_ADCEx_InjectedConfigChannel().

◆ ADC_SQR3_RK

#define ADC_SQR3_RK	(		_CHANNELNB_,
			_RANKNB_ )

#include <stm32f4xx_hal_adc.h>

Value:

(((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))

Set the selected regular channel rank for rank between 1 and 6.

Parameters

_CHANNELNB_	Channel number.
_RANKNB_	Rank number.

Return values

None

Definition at line 811 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel().

◆ ADC_SQR2_RK

#define ADC_SQR2_RK	(		_CHANNELNB_,
			_RANKNB_ )

#include <stm32f4xx_hal_adc.h>

Value:

(((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))

Set the selected regular channel rank for rank between 7 and 12.

Parameters

_CHANNELNB_	Channel number.
_RANKNB_	Rank number.

Return values

None

Definition at line 819 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel().

◆ ADC_SQR1_RK

#define ADC_SQR1_RK	(		_CHANNELNB_,
			_RANKNB_ )

#include <stm32f4xx_hal_adc.h>

Value:

(((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))

Set the selected regular channel rank for rank between 13 and 16.

Parameters

_CHANNELNB_	Channel number.
_RANKNB_	Rank number.

Return values

None

Definition at line 827 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_ConfigChannel().

◆ ADC_CR2_CONTINUOUS

#define ADC_CR2_CONTINUOUS ( _CONTINUOUS_MODE_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_CONTINUOUS_MODE_) << 1U)

Enable ADC continuous conversion mode.

Parameters

_CONTINUOUS_MODE_ Continuous mode.

Return values

None

Definition at line 834 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ ADC_CR1_DISCONTINUOUS

#define ADC_CR1_DISCONTINUOUS ( _NBR_DISCONTINUOUSCONV_ )

#include <stm32f4xx_hal_adc.h>

Value:

(((_NBR_DISCONTINUOUSCONV_) - 1U) << ADC_CR1_DISCNUM_Pos)

Configures the number of discontinuous conversions for the regular group channels.

Parameters

_NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.

Return values

None

Definition at line 841 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ ADC_CR1_SCANCONV

#define ADC_CR1_SCANCONV ( _SCANCONV_MODE_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_SCANCONV_MODE_) << 8U)

Enable ADC scan mode.

Parameters

_SCANCONV_MODE_ Scan conversion mode.

Return values

None

Definition at line 848 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ ADC_CR2_EOCSelection

#define ADC_CR2_EOCSelection ( _EOCSelection_MODE_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_EOCSelection_MODE_) << 10U)

Enable the ADC end of conversion selection.

Parameters

_EOCSelection_MODE_ End of conversion selection mode.

Return values

None

Definition at line 855 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ ADC_CR2_DMAContReq

#define ADC_CR2_DMAContReq ( _DMAContReq_MODE_ )

#include <stm32f4xx_hal_adc.h>

Value:

((_DMAContReq_MODE_) << 9U)

Enable the ADC DMA continuous request.

Parameters

_DMAContReq_MODE_ DMA continuous request mode.

Return values

None

Definition at line 862 of file stm32f4xx_hal_adc.h.

Referenced by ADC_Init().

◆ ADC_GET_RESOLUTION

#define ADC_GET_RESOLUTION ( __HANDLE__ )

#include <stm32f4xx_hal_adc.h>

Value:

(((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)

Return resolution bits in CR1 register.

Parameters

__HANDLE__ ADC handle

Return values

None

Definition at line 869 of file stm32f4xx_hal_adc.h.

Referenced by HAL_ADC_AnalogWDGConfig(), and HAL_ADCEx_InjectedConfigChannel().