STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
Loading...
Searching...
No Matches
FMPI2C Private Define
Collaboration diagram for FMPI2C Private Define:

Macros

#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)
 
#define FMPI2C_TIMEOUT_ADDR   (10000U)
 
#define FMPI2C_TIMEOUT_BUSY   (25U)
 
#define FMPI2C_TIMEOUT_DIR   (25U)
 
#define FMPI2C_TIMEOUT_RXNE   (25U)
 
#define FMPI2C_TIMEOUT_STOPF   (25U)
 
#define FMPI2C_TIMEOUT_TC   (25U)
 
#define FMPI2C_TIMEOUT_TCR   (25U)
 
#define FMPI2C_TIMEOUT_TXIS   (25U)
 
#define FMPI2C_TIMEOUT_FLAG   (25U)
 
#define MAX_NBYTE_SIZE   255U
 
#define SLAVE_ADDR_SHIFT   7U
 
#define SLAVE_ADDR_MSK   0x06U
 
#define FMPI2C_STATE_MSK
 
#define FMPI2C_STATE_NONE   ((uint32_t)(HAL_FMPI2C_MODE_NONE))
 
#define FMPI2C_STATE_MASTER_BUSY_TX
 
#define FMPI2C_STATE_MASTER_BUSY_RX
 
#define FMPI2C_STATE_SLAVE_BUSY_TX
 
#define FMPI2C_STATE_SLAVE_BUSY_RX
 
#define FMPI2C_STATE_MEM_BUSY_TX
 
#define FMPI2C_STATE_MEM_BUSY_RX
 
#define FMPI2C_XFER_TX_IT   (uint16_t)(0x0001U)
 
#define FMPI2C_XFER_RX_IT   (uint16_t)(0x0002U)
 
#define FMPI2C_XFER_LISTEN_IT   (uint16_t)(0x8000U)
 
#define FMPI2C_XFER_ERROR_IT   (uint16_t)(0x0010U)
 
#define FMPI2C_XFER_CPLT_IT   (uint16_t)(0x0020U)
 
#define FMPI2C_XFER_RELOAD_IT   (uint16_t)(0x0040U)
 
#define FMPI2C_NO_OPTION_FRAME   (0xFFFF0000U)
 

Detailed Description

Macro Definition Documentation

◆ TIMING_CLEAR_MASK

#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)

#include <stm32f4xx_hal_fmpi2c.c>

FMPI2C TIMING clear register Mask

Definition at line 343 of file stm32f4xx_hal_fmpi2c.c.

Referenced by HAL_FMPI2C_Init().

◆ FMPI2C_TIMEOUT_ADDR

#define FMPI2C_TIMEOUT_ADDR   (10000U)

#include <stm32f4xx_hal_fmpi2c.c>

10 s

Definition at line 344 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_BUSY

#define FMPI2C_TIMEOUT_BUSY   (25U)

◆ FMPI2C_TIMEOUT_DIR

#define FMPI2C_TIMEOUT_DIR   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 346 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_RXNE

#define FMPI2C_TIMEOUT_RXNE   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 347 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_STOPF

#define FMPI2C_TIMEOUT_STOPF   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 348 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_IsErrorOccurred().

◆ FMPI2C_TIMEOUT_TC

#define FMPI2C_TIMEOUT_TC   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 349 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_TCR

#define FMPI2C_TIMEOUT_TCR   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 350 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_TXIS

#define FMPI2C_TIMEOUT_TXIS   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 351 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_TIMEOUT_FLAG

#define FMPI2C_TIMEOUT_FLAG   (25U)

#include <stm32f4xx_hal_fmpi2c.c>

25 ms

Definition at line 352 of file stm32f4xx_hal_fmpi2c.c.

◆ MAX_NBYTE_SIZE

◆ SLAVE_ADDR_SHIFT

#define SLAVE_ADDR_SHIFT   7U

#include <stm32f4xx_hal_fmpi2c.c>

Definition at line 355 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITAddrCplt().

◆ SLAVE_ADDR_MSK

#define SLAVE_ADDR_MSK   0x06U

#include <stm32f4xx_hal_fmpi2c.c>

Definition at line 356 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITAddrCplt().

◆ FMPI2C_STATE_MSK

#define FMPI2C_STATE_MSK

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)((uint32_t)((uint32_t)HAL_FMPI2C_STATE_BUSY_TX | \
(uint32_t)HAL_FMPI2C_STATE_BUSY_RX) & \
(uint32_t)(~((uint32_t)HAL_FMPI2C_STATE_READY))))
@ HAL_FMPI2C_STATE_BUSY_RX
@ HAL_FMPI2C_STATE_READY
@ HAL_FMPI2C_STATE_BUSY_TX

Mask State define, keep only RX and TX bits

Definition at line 359 of file stm32f4xx_hal_fmpi2c.c.

Referenced by HAL_FMPI2C_DisableListen_IT().

◆ FMPI2C_STATE_NONE

#define FMPI2C_STATE_NONE   ((uint32_t)(HAL_FMPI2C_MODE_NONE))

◆ FMPI2C_STATE_MASTER_BUSY_TX

#define FMPI2C_STATE_MASTER_BUSY_TX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) | \
#define FMPI2C_STATE_MSK
@ HAL_FMPI2C_MODE_MASTER

Master Busy TX, combinaison of State LSB and Mode enum

Definition at line 365 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITError(), FMPI2C_ITMasterCplt(), FMPI2C_ITMasterSeqCplt(), HAL_FMPI2C_Master_Abort_IT(), HAL_FMPI2C_Master_Seq_Transmit_DMA(), and HAL_FMPI2C_Master_Seq_Transmit_IT().

◆ FMPI2C_STATE_MASTER_BUSY_RX

#define FMPI2C_STATE_MASTER_BUSY_RX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) | \

Master Busy RX, combinaison of State LSB and Mode enum

Definition at line 368 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITError(), FMPI2C_ITMasterCplt(), FMPI2C_ITMasterSeqCplt(), HAL_FMPI2C_Master_Abort_IT(), HAL_FMPI2C_Master_Seq_Receive_DMA(), and HAL_FMPI2C_Master_Seq_Receive_IT().

◆ FMPI2C_STATE_SLAVE_BUSY_TX

#define FMPI2C_STATE_SLAVE_BUSY_TX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) | \
@ HAL_FMPI2C_MODE_SLAVE

Slave Busy TX, combinaison of State LSB and Mode enum

Definition at line 371 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITError(), FMPI2C_ITSlaveCplt(), FMPI2C_ITSlaveSeqCplt(), and FMPI2C_Slave_ISR_DMA().

◆ FMPI2C_STATE_SLAVE_BUSY_RX

#define FMPI2C_STATE_SLAVE_BUSY_RX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) | \

Slave Busy RX, combinaison of State LSB and Mode enum

Definition at line 374 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_ITError(), FMPI2C_ITSlaveCplt(), FMPI2C_ITSlaveSeqCplt(), and FMPI2C_Slave_ISR_DMA().

◆ FMPI2C_STATE_MEM_BUSY_TX

#define FMPI2C_STATE_MEM_BUSY_TX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) | \
(uint32_t)HAL_FMPI2C_MODE_MEM))
@ HAL_FMPI2C_MODE_MEM

Memory Busy TX, combinaison of State LSB and Mode enum

Definition at line 377 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_STATE_MEM_BUSY_RX

#define FMPI2C_STATE_MEM_BUSY_RX

#include <stm32f4xx_hal_fmpi2c.c>

Value:
((uint32_t)(((uint32_t)HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) | \
(uint32_t)HAL_FMPI2C_MODE_MEM))

Memory Busy RX, combinaison of State LSB and Mode enum

Definition at line 380 of file stm32f4xx_hal_fmpi2c.c.

◆ FMPI2C_XFER_TX_IT

◆ FMPI2C_XFER_RX_IT

◆ FMPI2C_XFER_LISTEN_IT

◆ FMPI2C_XFER_ERROR_IT

#define FMPI2C_XFER_ERROR_IT   (uint16_t)(0x0010U)

◆ FMPI2C_XFER_CPLT_IT

#define FMPI2C_XFER_CPLT_IT   (uint16_t)(0x0020U)

◆ FMPI2C_XFER_RELOAD_IT

#define FMPI2C_XFER_RELOAD_IT   (uint16_t)(0x0040U)

#include <stm32f4xx_hal_fmpi2c.c>

Bit definition to manage only Reload of NBYTE

Definition at line 396 of file stm32f4xx_hal_fmpi2c.c.

Referenced by FMPI2C_Disable_IRQ(), FMPI2C_DMAMasterReceiveCplt(), FMPI2C_DMAMasterTransmitCplt(), and FMPI2C_Enable_IRQ().

◆ FMPI2C_NO_OPTION_FRAME