STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros | |
#define | SMBUS_TIMEOUT_FLAG 35U |
#define | SMBUS_TIMEOUT_BUSY_FLAG 25U |
#define | SMBUS_NO_OPTION_FRAME 0xFFFF0000U |
#define | SMBUS_SENDPEC_MODE I2C_CR1_PEC |
#define | SMBUS_GET_PEC(__HANDLE__) |
#define | SMBUS_STATE_MSK ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX | HAL_SMBUS_STATE_BUSY_RX) & (~(uint32_t)HAL_SMBUS_STATE_READY))) |
#define | SMBUS_STATE_NONE ((uint32_t)(HAL_SMBUS_MODE_NONE)) |
#define | SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_MASTER)) |
#define | SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_SMBUS_STATE_BUSY_RX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_MASTER)) |
#define | SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_SLAVE)) |
#define | SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_SMBUS_STATE_BUSY_RX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_SLAVE)) |
#define SMBUS_TIMEOUT_FLAG 35U |
#include <stm32f4xx_hal_smbus.c>
Timeout 35 ms
Definition at line 187 of file stm32f4xx_hal_smbus.c.
#define SMBUS_TIMEOUT_BUSY_FLAG 25U |
#include <stm32f4xx_hal_smbus.c>
Timeout 25 ms
Definition at line 188 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_IsDeviceReady(), HAL_SMBUS_Master_Receive_IT(), and HAL_SMBUS_Master_Transmit_IT().
#define SMBUS_NO_OPTION_FRAME 0xFFFF0000U |
#include <stm32f4xx_hal_smbus.c>
XferOptions default value
Definition at line 189 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_IsDeviceReady(), HAL_SMBUS_Master_Receive_IT(), SMBUS_ITError(), SMBUS_MasterTransmit_BTF(), SMBUS_MasterTransmit_TXE(), SMBUS_Slave_AF(), and SMBUS_Slave_STOPF().
#define SMBUS_SENDPEC_MODE I2C_CR1_PEC |
#include <stm32f4xx_hal_smbus.c>
Definition at line 191 of file stm32f4xx_hal_smbus.c.
#define SMBUS_GET_PEC | ( | __HANDLE__ | ) |
#include <stm32f4xx_hal_smbus.c>
Definition at line 192 of file stm32f4xx_hal_smbus.c.
Referenced by SMBUS_MasterReceive_BTF(), SMBUS_MasterReceive_RXNE(), and SMBUS_SlaveReceive_RXNE().
#define SMBUS_STATE_MSK ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX | HAL_SMBUS_STATE_BUSY_RX) & (~(uint32_t)HAL_SMBUS_STATE_READY))) |
#include <stm32f4xx_hal_smbus.c>
Mask State define, keep only RX and TX bits
Definition at line 195 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_DisableListen_IT().
#define SMBUS_STATE_NONE ((uint32_t)(HAL_SMBUS_MODE_NONE)) |
#include <stm32f4xx_hal_smbus.c>
Default Value
Definition at line 196 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_DeInit(), HAL_SMBUS_Init(), HAL_SMBUS_Master_Abort_IT(), HAL_SMBUS_Master_Receive_IT(), HAL_SMBUS_Master_Transmit_IT(), SMBUS_ITError(), SMBUS_MasterReceive_BTF(), SMBUS_MasterReceive_RXNE(), SMBUS_MasterTransmit_BTF(), and SMBUS_WaitOnFlagUntilTimeout().
#define SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_MASTER)) |
#include <stm32f4xx_hal_smbus.c>
Master Busy TX, combinaison of State LSB and Mode enum
Definition at line 197 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_Master_Receive_IT(), SMBUS_MasterTransmit_BTF(), and SMBUS_MasterTransmit_TXE().
#define SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_SMBUS_STATE_BUSY_RX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_MASTER)) |
#include <stm32f4xx_hal_smbus.c>
Master Busy RX, combinaison of State LSB and Mode enum
Definition at line 198 of file stm32f4xx_hal_smbus.c.
Referenced by SMBUS_Master_ADDR().
#define SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_SMBUS_STATE_BUSY_TX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_SLAVE)) |
#include <stm32f4xx_hal_smbus.c>
Slave Busy TX, combinaison of State LSB and Mode enum
Definition at line 199 of file stm32f4xx_hal_smbus.c.
Referenced by HAL_SMBUS_ER_IRQHandler(), and SMBUS_SlaveTransmit_TXE().
#define SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_SMBUS_STATE_BUSY_RX & SMBUS_STATE_MSK) | HAL_SMBUS_MODE_SLAVE)) |
#include <stm32f4xx_hal_smbus.c>
Slave Busy RX, combinaison of State LSB and Mode enum
Definition at line 200 of file stm32f4xx_hal_smbus.c.
Referenced by SMBUS_SlaveReceive_RXNE().