STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
|
Macros | |
#define | TIM_OCMODE_TIMING 0x00000000U |
#define | TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 |
#define | TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 |
#define | TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
#define | TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
#define | TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
#define | TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
#define | TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 |
#define TIM_OCMODE_TIMING 0x00000000U |
#define TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 |
#include <stm32f4xx_hal_tim.h>
Set channel to active level on match
Definition at line 902 of file stm32f4xx_hal_tim.h.
#define TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 |
#include <stm32f4xx_hal_tim.h>
Set channel to inactive level on match
Definition at line 903 of file stm32f4xx_hal_tim.h.
#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
#include <stm32f4xx_hal_tim.h>
PWM mode 2
Definition at line 906 of file stm32f4xx_hal_tim.h.
Referenced by HAL_TIMEx_HallSensor_Init().
#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
#include <stm32f4xx_hal_tim.h>
Force active level
Definition at line 907 of file stm32f4xx_hal_tim.h.
#define TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 |
#include <stm32f4xx_hal_tim.h>
Force inactive level
Definition at line 908 of file stm32f4xx_hal_tim.h.