20#ifndef STM32F4xx_HAL_DMA2D_H
21#define STM32F4xx_HAL_DMA2D_H
45#define MAX_DMA2D_LAYER 2U
138#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
158#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
176#define HAL_DMA2D_ERROR_NONE 0x00000000U
177#define HAL_DMA2D_ERROR_TE 0x00000001U
178#define HAL_DMA2D_ERROR_CE 0x00000002U
179#define HAL_DMA2D_ERROR_CAE 0x00000004U
180#define HAL_DMA2D_ERROR_TIMEOUT 0x00000020U
181#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
182#define HAL_DMA2D_ERROR_INVALID_CALLBACK 0x00000040U
192#define DMA2D_M2M 0x00000000U
193#define DMA2D_M2M_PFC DMA2D_CR_MODE_0
194#define DMA2D_M2M_BLEND DMA2D_CR_MODE_1
195#define DMA2D_R2M DMA2D_CR_MODE
203#define DMA2D_OUTPUT_ARGB8888 0x00000000U
204#define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0
205#define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1
206#define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1)
207#define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2
215#define DMA2D_INPUT_ARGB8888 0x00000000U
216#define DMA2D_INPUT_RGB888 0x00000001U
217#define DMA2D_INPUT_RGB565 0x00000002U
218#define DMA2D_INPUT_ARGB1555 0x00000003U
219#define DMA2D_INPUT_ARGB4444 0x00000004U
220#define DMA2D_INPUT_L8 0x00000005U
221#define DMA2D_INPUT_AL44 0x00000006U
222#define DMA2D_INPUT_AL88 0x00000007U
223#define DMA2D_INPUT_L4 0x00000008U
224#define DMA2D_INPUT_A8 0x00000009U
225#define DMA2D_INPUT_A4 0x0000000AU
233#define DMA2D_NO_MODIF_ALPHA 0x00000000U
234#define DMA2D_REPLACE_ALPHA 0x00000001U
235#define DMA2D_COMBINE_ALPHA 0x00000002U
249#define DMA2D_CCM_ARGB8888 0x00000000U
250#define DMA2D_CCM_RGB888 0x00000001U
258#define DMA2D_IT_CE DMA2D_CR_CEIE
259#define DMA2D_IT_CTC DMA2D_CR_CTCIE
260#define DMA2D_IT_CAE DMA2D_CR_CAEIE
261#define DMA2D_IT_TW DMA2D_CR_TWIE
262#define DMA2D_IT_TC DMA2D_CR_TCIE
263#define DMA2D_IT_TE DMA2D_CR_TEIE
271#define DMA2D_FLAG_CE DMA2D_ISR_CEIF
272#define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF
273#define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF
274#define DMA2D_FLAG_TW DMA2D_ISR_TWIF
275#define DMA2D_FLAG_TC DMA2D_ISR_TCIF
276#define DMA2D_FLAG_TE DMA2D_ISR_TEIF
281#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
287 HAL_DMA2D_MSPINIT_CB_ID = 0x00U,
288 HAL_DMA2D_MSPDEINIT_CB_ID = 0x01U,
289 HAL_DMA2D_TRANSFERCOMPLETE_CB_ID = 0x02U,
290 HAL_DMA2D_TRANSFERERROR_CB_ID = 0x03U,
291 HAL_DMA2D_LINEEVENT_CB_ID = 0x04U,
292 HAL_DMA2D_CLUTLOADINGCPLT_CB_ID = 0x05U,
293} HAL_DMA2D_CallbackIDTypeDef;
309#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
310#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) do{ \
311 (__HANDLE__)->State = HAL_DMA2D_STATE_RESET;\
312 (__HANDLE__)->MspInitCallback = NULL; \
313 (__HANDLE__)->MspDeInitCallback = NULL; \
316#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
325#define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
342#define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
357#define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
372#define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
387#define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
402#define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
423#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
425 pDMA2D_CallbackTypeDef pCallback);
442 uint32_t DstAddress, uint32_t Width, uint32_t Height);
446 uint32_t DstAddress, uint32_t Width, uint32_t Height);
510#define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW
518#define DMA2D_COLOR_VALUE 0x000000FFU
526#define DMA2D_MAX_LAYER 2U
534#define DMA2D_BACKGROUND_LAYER 0x00000000U
535#define DMA2D_FOREGROUND_LAYER 0x00000001U
543#define DMA2D_OFFSET DMA2D_FGOR_LO
551#define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U)
552#define DMA2D_LINE DMA2D_NLR_NL
560#define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U)
574#define IS_DMA2D_LAYER(LAYER) (((LAYER) == DMA2D_BACKGROUND_LAYER)\
575 || ((LAYER) == DMA2D_FOREGROUND_LAYER))
577#define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
578 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
580#define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || \
581 ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \
582 ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || \
583 ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
584 ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
586#define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE)
587#define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
588#define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
589#define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
591#define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || \
592 ((INPUT_CM) == DMA2D_INPUT_RGB888) || \
593 ((INPUT_CM) == DMA2D_INPUT_RGB565) || \
594 ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
595 ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || \
596 ((INPUT_CM) == DMA2D_INPUT_L8) || \
597 ((INPUT_CM) == DMA2D_INPUT_AL44) || \
598 ((INPUT_CM) == DMA2D_INPUT_AL88) || \
599 ((INPUT_CM) == DMA2D_INPUT_L4) || \
600 ((INPUT_CM) == DMA2D_INPUT_A8) || \
601 ((INPUT_CM) == DMA2D_INPUT_A4))
603#define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
604 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
605 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
611#define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
612#define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
613#define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
614#define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
615 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
616 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
617#define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
618 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
619 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
Deinitializes the DMA2D peripheral registers to their default reset values.
void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef *hdma2d)
DeInitializes the DMA2D MSP.
HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
Initialize the DMA2D according to the specified parameters in the DMA2D_InitTypeDef and create the as...
void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef *hdma2d)
Initializes the DMA2D MSP.
HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
Start the DMA2D Transfer with interrupt enabled.
HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
Enable the DMA2D CLUT Transfer.
void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d)
CLUT Transfer Complete callback.
HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
Polling for transfer complete or CLUT loading.
HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
Resume the DMA2D Transfer.
void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d)
Transfer watermark callback.
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
Abort the DMA2D CLUT loading.
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
Start DMA2D CLUT Loading.
HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx)
Start DMA2D CLUT Loading with interrupt enabled.
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
Suspend the DMA2D CLUT loading.
HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
Start the DMA2D Transfer.
HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx)
Start DMA2D CLUT Loading.
void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
Handle DMA2D interrupt request.
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
Resume the DMA2D CLUT loading.
HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
Abort the DMA2D Transfer.
HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
Start the multi-source DMA2D Transfer with interrupt enabled.
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
Start DMA2D CLUT Loading with interrupt enabled.
HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
Suspend the DMA2D Transfer.
HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
Start the multi-source DMA2D Transfer.
HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
Configure the line watermark.
HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d)
Enable DMA2D dead time feature.
HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime)
Configure dead time.
HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d)
Disable DMA2D dead time feature.
HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
Configure the DMA2D CLUT Transfer.
HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
Configure the DMA2D Layer according to the specified parameters in the DMA2D_HandleTypeDef.
HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
Return the DMA2D state.
uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
Return the DMA2D error code.
struct __DMA2D_HandleTypeDef DMA2D_HandleTypeDef
DMA2D handle Structure definition.
HAL_DMA2D_StateTypeDef
HAL DMA2D State structures definition.
@ HAL_DMA2D_STATE_SUSPEND
@ HAL_DMA2D_STATE_TIMEOUT
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
HAL_LockTypeDef
HAL Lock structures definition
DMA2D CLUT Structure definition.
DMA2D Init structure definition.
DMA2D Layer structure definition.
DMA2D handle Structure definition.
void(* XferErrorCallback)(struct __DMA2D_HandleTypeDef *hdma2d)
DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]
void(* XferCpltCallback)(struct __DMA2D_HandleTypeDef *hdma2d)
__IO HAL_DMA2D_StateTypeDef State