STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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stm32f4xx_hal_fmpsmbus.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F4xx_HAL_FMPSMBUS_H
21#define STM32F4xx_HAL_FMPSMBUS_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#if defined(FMPI2C_CR1_PE)
28/* Includes ------------------------------------------------------------------*/
29#include "stm32f4xx_hal_def.h"
30
39/* Exported types ------------------------------------------------------------*/
48typedef struct
49{
50 uint32_t Timing;
53 uint32_t AnalogFilter;
56 uint32_t OwnAddress1;
59 uint32_t AddressingMode;
62 uint32_t DualAddressMode;
65 uint32_t OwnAddress2;
68 uint32_t OwnAddress2Masks;
72 uint32_t GeneralCallMode;
75 uint32_t NoStretchMode;
78 uint32_t PacketErrorCheckMode;
81 uint32_t PeripheralMode;
84 uint32_t SMBusTimeout;
88} FMPSMBUS_InitTypeDef;
97#define HAL_FMPSMBUS_STATE_RESET (0x00000000U)
98#define HAL_FMPSMBUS_STATE_READY (0x00000001U)
99#define HAL_FMPSMBUS_STATE_BUSY (0x00000002U)
100#define HAL_FMPSMBUS_STATE_MASTER_BUSY_TX (0x00000012U)
101#define HAL_FMPSMBUS_STATE_MASTER_BUSY_RX (0x00000022U)
102#define HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX (0x00000032U)
103#define HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX (0x00000042U)
104#define HAL_FMPSMBUS_STATE_LISTEN (0x00000008U)
113#define HAL_FMPSMBUS_ERROR_NONE (0x00000000U)
114#define HAL_FMPSMBUS_ERROR_BERR (0x00000001U)
115#define HAL_FMPSMBUS_ERROR_ARLO (0x00000002U)
116#define HAL_FMPSMBUS_ERROR_ACKF (0x00000004U)
117#define HAL_FMPSMBUS_ERROR_OVR (0x00000008U)
118#define HAL_FMPSMBUS_ERROR_HALTIMEOUT (0x00000010U)
119#define HAL_FMPSMBUS_ERROR_BUSTIMEOUT (0x00000020U)
120#define HAL_FMPSMBUS_ERROR_ALERT (0x00000040U)
121#define HAL_FMPSMBUS_ERROR_PECERR (0x00000080U)
122#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
123#define HAL_FMPSMBUS_ERROR_INVALID_CALLBACK (0x00000100U)
124#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
125#define HAL_FMPSMBUS_ERROR_INVALID_PARAM (0x00000200U)
134#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
135typedef struct __FMPSMBUS_HandleTypeDef
136#else
137typedef struct
138#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
139{
140 FMPI2C_TypeDef *Instance;
142 FMPSMBUS_InitTypeDef Init;
144 uint8_t *pBuffPtr;
146 uint16_t XferSize;
148 __IO uint16_t XferCount;
150 __IO uint32_t XferOptions;
152 __IO uint32_t PreviousState;
154 HAL_LockTypeDef Lock;
156 __IO uint32_t State;
158 __IO uint32_t ErrorCode;
160#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
161 void (* MasterTxCpltCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
163 void (* MasterRxCpltCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
165 void (* SlaveTxCpltCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
167 void (* SlaveRxCpltCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
169 void (* ListenCpltCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
171 void (* ErrorCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
174 void (* AddrCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
177 void (* MspInitCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
179 void (* MspDeInitCallback)(struct __FMPSMBUS_HandleTypeDef *hfmpsmbus);
182#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
183} FMPSMBUS_HandleTypeDef;
184
185#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
189typedef enum
190{
191 HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U,
192 HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U,
193 HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
194 HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
195 HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID = 0x04U,
196 HAL_FMPSMBUS_ERROR_CB_ID = 0x05U,
198 HAL_FMPSMBUS_MSPINIT_CB_ID = 0x06U,
199 HAL_FMPSMBUS_MSPDEINIT_CB_ID = 0x07U
201} HAL_FMPSMBUS_CallbackIDTypeDef;
202
206typedef void (*pFMPSMBUS_CallbackTypeDef)(FMPSMBUS_HandleTypeDef *hfmpsmbus);
208typedef void (*pFMPSMBUS_AddrCallbackTypeDef)(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection,
209 uint16_t AddrMatchCode);
212#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
220/* Exported constants --------------------------------------------------------*/
221
229#define FMPSMBUS_ANALOGFILTER_ENABLE (0x00000000U)
230#define FMPSMBUS_ANALOGFILTER_DISABLE FMPI2C_CR1_ANFOFF
238#define FMPSMBUS_ADDRESSINGMODE_7BIT (0x00000001U)
239#define FMPSMBUS_ADDRESSINGMODE_10BIT (0x00000002U)
248#define FMPSMBUS_DUALADDRESS_DISABLE (0x00000000U)
249#define FMPSMBUS_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
258#define FMPSMBUS_OA2_NOMASK ((uint8_t)0x00U)
259#define FMPSMBUS_OA2_MASK01 ((uint8_t)0x01U)
260#define FMPSMBUS_OA2_MASK02 ((uint8_t)0x02U)
261#define FMPSMBUS_OA2_MASK03 ((uint8_t)0x03U)
262#define FMPSMBUS_OA2_MASK04 ((uint8_t)0x04U)
263#define FMPSMBUS_OA2_MASK05 ((uint8_t)0x05U)
264#define FMPSMBUS_OA2_MASK06 ((uint8_t)0x06U)
265#define FMPSMBUS_OA2_MASK07 ((uint8_t)0x07U)
274#define FMPSMBUS_GENERALCALL_DISABLE (0x00000000U)
275#define FMPSMBUS_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
283#define FMPSMBUS_NOSTRETCH_DISABLE (0x00000000U)
284#define FMPSMBUS_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
292#define FMPSMBUS_PEC_DISABLE (0x00000000U)
293#define FMPSMBUS_PEC_ENABLE FMPI2C_CR1_PECEN
301#define FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_HOST FMPI2C_CR1_SMBHEN
302#define FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE (0x00000000U)
303#define FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE_ARP FMPI2C_CR1_SMBDEN
312#define FMPSMBUS_SOFTEND_MODE (0x00000000U)
313#define FMPSMBUS_RELOAD_MODE FMPI2C_CR2_RELOAD
314#define FMPSMBUS_AUTOEND_MODE FMPI2C_CR2_AUTOEND
315#define FMPSMBUS_SENDPEC_MODE FMPI2C_CR2_PECBYTE
324#define FMPSMBUS_NO_STARTSTOP (0x00000000U)
325#define FMPSMBUS_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP)
326#define FMPSMBUS_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
327#define FMPSMBUS_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START)
336/* List of XferOptions in usage of :
337 * 1- Restart condition when direction change
338 * 2- No Restart condition in other use cases
339 */
340#define FMPSMBUS_FIRST_FRAME FMPSMBUS_SOFTEND_MODE
341#define FMPSMBUS_NEXT_FRAME ((uint32_t)(FMPSMBUS_RELOAD_MODE | FMPSMBUS_SOFTEND_MODE))
342#define FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC FMPSMBUS_AUTOEND_MODE
343#define FMPSMBUS_LAST_FRAME_NO_PEC FMPSMBUS_AUTOEND_MODE
344#define FMPSMBUS_FIRST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_SOFTEND_MODE | FMPSMBUS_SENDPEC_MODE))
345#define FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE))
346#define FMPSMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE))
347
348/* List of XferOptions in usage of :
349 * 1- Restart condition in all use cases (direction change or not)
350 */
351#define FMPSMBUS_OTHER_FRAME_NO_PEC (0x000000AAU)
352#define FMPSMBUS_OTHER_FRAME_WITH_PEC (0x0000AA00U)
353#define FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC (0x00AA0000U)
354#define FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC (0xAA000000U)
365#define FMPSMBUS_IT_ERRI FMPI2C_CR1_ERRIE
366#define FMPSMBUS_IT_TCI FMPI2C_CR1_TCIE
367#define FMPSMBUS_IT_STOPI FMPI2C_CR1_STOPIE
368#define FMPSMBUS_IT_NACKI FMPI2C_CR1_NACKIE
369#define FMPSMBUS_IT_ADDRI FMPI2C_CR1_ADDRIE
370#define FMPSMBUS_IT_RXI FMPI2C_CR1_RXIE
371#define FMPSMBUS_IT_TXI FMPI2C_CR1_TXIE
372#define FMPSMBUS_IT_TX (FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | \
373 FMPSMBUS_IT_NACKI | FMPSMBUS_IT_TXI)
374#define FMPSMBUS_IT_RX (FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_NACKI | \
375 FMPSMBUS_IT_RXI)
376#define FMPSMBUS_IT_ALERT (FMPSMBUS_IT_ERRI)
377#define FMPSMBUS_IT_ADDR (FMPSMBUS_IT_ADDRI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI)
389#define FMPSMBUS_FLAG_TXE FMPI2C_ISR_TXE
390#define FMPSMBUS_FLAG_TXIS FMPI2C_ISR_TXIS
391#define FMPSMBUS_FLAG_RXNE FMPI2C_ISR_RXNE
392#define FMPSMBUS_FLAG_ADDR FMPI2C_ISR_ADDR
393#define FMPSMBUS_FLAG_AF FMPI2C_ISR_NACKF
394#define FMPSMBUS_FLAG_STOPF FMPI2C_ISR_STOPF
395#define FMPSMBUS_FLAG_TC FMPI2C_ISR_TC
396#define FMPSMBUS_FLAG_TCR FMPI2C_ISR_TCR
397#define FMPSMBUS_FLAG_BERR FMPI2C_ISR_BERR
398#define FMPSMBUS_FLAG_ARLO FMPI2C_ISR_ARLO
399#define FMPSMBUS_FLAG_OVR FMPI2C_ISR_OVR
400#define FMPSMBUS_FLAG_PECERR FMPI2C_ISR_PECERR
401#define FMPSMBUS_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
402#define FMPSMBUS_FLAG_ALERT FMPI2C_ISR_ALERT
403#define FMPSMBUS_FLAG_BUSY FMPI2C_ISR_BUSY
404#define FMPSMBUS_FLAG_DIR FMPI2C_ISR_DIR
413/* Exported macros ------------------------------------------------------------*/
422#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
423#define __HAL_FMPSMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \
424 (__HANDLE__)->State = HAL_FMPSMBUS_STATE_RESET; \
425 (__HANDLE__)->MspInitCallback = NULL; \
426 (__HANDLE__)->MspDeInitCallback = NULL; \
427 } while(0)
428#else
429#define __HAL_FMPSMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPSMBUS_STATE_RESET)
430#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
431
446#define __HAL_FMPSMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
447
462#define __HAL_FMPSMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
463
478#define __HAL_FMPSMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
479 ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
480
504#define FMPSMBUS_FLAG_MASK (0x0001FFFFU)
505#define __HAL_FMPSMBUS_GET_FLAG(__HANDLE__, __FLAG__) \
506 (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & FMPSMBUS_FLAG_MASK)) == \
507 ((__FLAG__) & FMPSMBUS_FLAG_MASK)) ? SET : RESET)
508
526#define __HAL_FMPSMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPSMBUS_FLAG_TXE) ? \
527 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
528 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
529
534#define __HAL_FMPSMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
535
540#define __HAL_FMPSMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
541
546#define __HAL_FMPSMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
547
553/* Private constants ---------------------------------------------------------*/
554
555/* Private macros ------------------------------------------------------------*/
560#define IS_FMPSMBUS_ANALOG_FILTER(FILTER) (((FILTER) == FMPSMBUS_ANALOGFILTER_ENABLE) || \
561 ((FILTER) == FMPSMBUS_ANALOGFILTER_DISABLE))
562
563#define IS_FMPSMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
564
565#define IS_FMPSMBUS_ADDRESSING_MODE(MODE) (((MODE) == FMPSMBUS_ADDRESSINGMODE_7BIT) || \
566 ((MODE) == FMPSMBUS_ADDRESSINGMODE_10BIT))
567
568#define IS_FMPSMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPSMBUS_DUALADDRESS_DISABLE) || \
569 ((ADDRESS) == FMPSMBUS_DUALADDRESS_ENABLE))
570
571#define IS_FMPSMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPSMBUS_OA2_NOMASK) || \
572 ((MASK) == FMPSMBUS_OA2_MASK01) || \
573 ((MASK) == FMPSMBUS_OA2_MASK02) || \
574 ((MASK) == FMPSMBUS_OA2_MASK03) || \
575 ((MASK) == FMPSMBUS_OA2_MASK04) || \
576 ((MASK) == FMPSMBUS_OA2_MASK05) || \
577 ((MASK) == FMPSMBUS_OA2_MASK06) || \
578 ((MASK) == FMPSMBUS_OA2_MASK07))
579
580#define IS_FMPSMBUS_GENERAL_CALL(CALL) (((CALL) == FMPSMBUS_GENERALCALL_DISABLE) || \
581 ((CALL) == FMPSMBUS_GENERALCALL_ENABLE))
582
583#define IS_FMPSMBUS_NO_STRETCH(STRETCH) (((STRETCH) == FMPSMBUS_NOSTRETCH_DISABLE) || \
584 ((STRETCH) == FMPSMBUS_NOSTRETCH_ENABLE))
585
586#define IS_FMPSMBUS_PEC(PEC) (((PEC) == FMPSMBUS_PEC_DISABLE) || \
587 ((PEC) == FMPSMBUS_PEC_ENABLE))
588
589#define IS_FMPSMBUS_PERIPHERAL_MODE(MODE) (((MODE) == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_HOST) || \
590 ((MODE) == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE) || \
591 ((MODE) == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE_ARP))
592
593#define IS_FMPSMBUS_TRANSFER_MODE(MODE) (((MODE) == FMPSMBUS_RELOAD_MODE) || \
594 ((MODE) == FMPSMBUS_AUTOEND_MODE) || \
595 ((MODE) == FMPSMBUS_SOFTEND_MODE) || \
596 ((MODE) == FMPSMBUS_SENDPEC_MODE) || \
597 ((MODE) == (FMPSMBUS_RELOAD_MODE | FMPSMBUS_SENDPEC_MODE)) || \
598 ((MODE) == (FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE)) || \
599 ((MODE) == (FMPSMBUS_AUTOEND_MODE | FMPSMBUS_RELOAD_MODE)) || \
600 ((MODE) == (FMPSMBUS_AUTOEND_MODE | FMPSMBUS_SENDPEC_MODE | \
601 FMPSMBUS_RELOAD_MODE )))
602
603
604#define IS_FMPSMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPSMBUS_GENERATE_STOP) || \
605 ((REQUEST) == FMPSMBUS_GENERATE_START_READ) || \
606 ((REQUEST) == FMPSMBUS_GENERATE_START_WRITE) || \
607 ((REQUEST) == FMPSMBUS_NO_STARTSTOP))
608
609
610#define IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \
611 ((REQUEST) == FMPSMBUS_FIRST_FRAME) || \
612 ((REQUEST) == FMPSMBUS_NEXT_FRAME) || \
613 ((REQUEST) == FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
614 ((REQUEST) == FMPSMBUS_LAST_FRAME_NO_PEC) || \
615 ((REQUEST) == FMPSMBUS_FIRST_FRAME_WITH_PEC) || \
616 ((REQUEST) == FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
617 ((REQUEST) == FMPSMBUS_LAST_FRAME_WITH_PEC))
618
619#define IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPSMBUS_OTHER_FRAME_NO_PEC) || \
620 ((REQUEST) == FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \
621 ((REQUEST) == FMPSMBUS_OTHER_FRAME_WITH_PEC) || \
622 ((REQUEST) == FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC))
623
624#define FMPSMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= \
625 (uint32_t)~((uint32_t)(FMPI2C_CR1_SMBHEN | FMPI2C_CR1_SMBDEN | \
626 FMPI2C_CR1_PECEN)))
627#define FMPSMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
628 (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | \
629 FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | \
630 FMPI2C_CR2_RD_WRN)))
631
632#define FMPSMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPSMBUS_ADDRESSINGMODE_7BIT) ? \
633 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \
634 (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & \
635 (~FMPI2C_CR2_RD_WRN)) : \
636 (uint32_t)((((uint32_t)(__ADDRESS__) & \
637 (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | \
638 (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))
639
640#define FMPSMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 17U)
641#define FMPSMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16U)
642#define FMPSMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
643#define FMPSMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_PECBYTE)
644#define FMPSMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & FMPI2C_CR1_ALERTEN)
645
646#define FMPSMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & FMPSMBUS_FLAG_MASK)) == \
647 ((__FLAG__) & FMPSMBUS_FLAG_MASK)) ? SET : RESET)
648#define FMPSMBUS_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
649
650#define IS_FMPSMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
651#define IS_FMPSMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
652
657/* Include FMPSMBUS HAL Extended module */
658#include "stm32f4xx_hal_fmpsmbus_ex.h"
659
660/* Exported functions --------------------------------------------------------*/
669/* Initialization and de-initialization functions ****************************/
670HAL_StatusTypeDef HAL_FMPSMBUS_Init(FMPSMBUS_HandleTypeDef *hfmpsmbus);
671HAL_StatusTypeDef HAL_FMPSMBUS_DeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus);
672void HAL_FMPSMBUS_MspInit(FMPSMBUS_HandleTypeDef *hfmpsmbus);
673void HAL_FMPSMBUS_MspDeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus);
674HAL_StatusTypeDef HAL_FMPSMBUS_ConfigAnalogFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t AnalogFilter);
675HAL_StatusTypeDef HAL_FMPSMBUS_ConfigDigitalFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t DigitalFilter);
676
677/* Callbacks Register/UnRegister functions ***********************************/
678#if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
679HAL_StatusTypeDef HAL_FMPSMBUS_RegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus,
680 HAL_FMPSMBUS_CallbackIDTypeDef CallbackID,
681 pFMPSMBUS_CallbackTypeDef pCallback);
682HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus,
683 HAL_FMPSMBUS_CallbackIDTypeDef CallbackID);
684
685HAL_StatusTypeDef HAL_FMPSMBUS_RegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus,
686 pFMPSMBUS_AddrCallbackTypeDef pCallback);
687HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
688#endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
697/* IO operation functions *****************************************************/
701/******* Blocking mode: Polling */
702HAL_StatusTypeDef HAL_FMPSMBUS_IsDeviceReady(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint32_t Trials,
703 uint32_t Timeout);
711/******* Non-Blocking mode: Interrupt */
712HAL_StatusTypeDef HAL_FMPSMBUS_Master_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress,
713 uint8_t *pData, uint16_t Size, uint32_t XferOptions);
714HAL_StatusTypeDef HAL_FMPSMBUS_Master_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress,
715 uint8_t *pData, uint16_t Size, uint32_t XferOptions);
716HAL_StatusTypeDef HAL_FMPSMBUS_Master_Abort_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress);
717HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
718 uint32_t XferOptions);
719HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
720 uint32_t XferOptions);
721
722HAL_StatusTypeDef HAL_FMPSMBUS_EnableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus);
723HAL_StatusTypeDef HAL_FMPSMBUS_DisableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus);
724HAL_StatusTypeDef HAL_FMPSMBUS_EnableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus);
725HAL_StatusTypeDef HAL_FMPSMBUS_DisableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus);
733/******* FMPSMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
734void HAL_FMPSMBUS_EV_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus);
735void HAL_FMPSMBUS_ER_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus);
736void HAL_FMPSMBUS_MasterTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
737void HAL_FMPSMBUS_MasterRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
738void HAL_FMPSMBUS_SlaveTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
739void HAL_FMPSMBUS_SlaveRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
740void HAL_FMPSMBUS_AddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
741void HAL_FMPSMBUS_ListenCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
742void HAL_FMPSMBUS_ErrorCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus);
743
752/* Peripheral State and Errors functions **************************************************/
753uint32_t HAL_FMPSMBUS_GetState(const FMPSMBUS_HandleTypeDef *hfmpsmbus);
754uint32_t HAL_FMPSMBUS_GetError(const FMPSMBUS_HandleTypeDef *hfmpsmbus);
755
764/* Private Functions ---------------------------------------------------------*/
768/* Private functions are defined in stm32f4xx_hal_fmpsmbus.c file */
785#endif /* FMPI2C_CR1_PE */
786#ifdef __cplusplus
787}
788#endif
789
790
791#endif /* STM32F4xx_HAL_FMPSMBUS_H */
HAL_FMPSMBUS_IsDeviceReady
HAL_StatusTypeDef HAL_FMPSMBUS_IsDeviceReady(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
Check if target device is ready for communication.
Definition stm32f4xx_hal_fmpsmbus.c:1484
HAL_FMPSMBUS_ConfigAnalogFilter
HAL_StatusTypeDef HAL_FMPSMBUS_ConfigAnalogFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t AnalogFilter)
Configure Analog noise filter.
Definition stm32f4xx_hal_fmpsmbus.c:495
HAL_FMPSMBUS_ConfigDigitalFilter
HAL_StatusTypeDef HAL_FMPSMBUS_ConfigDigitalFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t DigitalFilter)
Configure Digital noise filter.
Definition stm32f4xx_hal_fmpsmbus.c:539
HAL_FMPSMBUS_MspInit
void HAL_FMPSMBUS_MspInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Initialize the FMPSMBUS MSP.
Definition stm32f4xx_hal_fmpsmbus.c:460
HAL_FMPSMBUS_Init
HAL_StatusTypeDef HAL_FMPSMBUS_Init(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Initialize the FMPSMBUS according to the specified parameters in the FMPSMBUS_InitTypeDef and initial...
Definition stm32f4xx_hal_fmpsmbus.c:290
HAL_FMPSMBUS_DeInit
HAL_StatusTypeDef HAL_FMPSMBUS_DeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
DeInitialize the FMPSMBUS peripheral.
Definition stm32f4xx_hal_fmpsmbus.c:415
HAL_FMPSMBUS_MspDeInit
void HAL_FMPSMBUS_MspDeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
DeInitialize the FMPSMBUS MSP.
Definition stm32f4xx_hal_fmpsmbus.c:476
HAL_FMPSMBUS_GetError
uint32_t HAL_FMPSMBUS_GetError(const FMPSMBUS_HandleTypeDef *hfmpsmbus)
Return the FMPSMBUS error code.
Definition stm32f4xx_hal_fmpsmbus.c:1861
HAL_FMPSMBUS_GetState
uint32_t HAL_FMPSMBUS_GetState(const FMPSMBUS_HandleTypeDef *hfmpsmbus)
Return the FMPSMBUS handle state.
Definition stm32f4xx_hal_fmpsmbus.c:1849
HAL_FMPSMBUS_ListenCpltCallback
void HAL_FMPSMBUS_ListenCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Listen Complete callback.
Definition stm32f4xx_hal_fmpsmbus.c:1798
HAL_FMPSMBUS_MasterTxCpltCallback
void HAL_FMPSMBUS_MasterTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Master Tx Transfer completed callback.
Definition stm32f4xx_hal_fmpsmbus.c:1714
HAL_FMPSMBUS_EV_IRQHandler
void HAL_FMPSMBUS_EV_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Handle FMPSMBUS event interrupt request.
Definition stm32f4xx_hal_fmpsmbus.c:1625
HAL_FMPSMBUS_ErrorCallback
void HAL_FMPSMBUS_ErrorCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
FMPSMBUS error callback.
Definition stm32f4xx_hal_fmpsmbus.c:1814
HAL_FMPSMBUS_ER_IRQHandler
void HAL_FMPSMBUS_ER_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Handle FMPSMBUS error interrupt request.
Definition stm32f4xx_hal_fmpsmbus.c:1703
HAL_FMPSMBUS_MasterRxCpltCallback
void HAL_FMPSMBUS_MasterRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Master Rx Transfer completed callback.
Definition stm32f4xx_hal_fmpsmbus.c:1730
HAL_FMPSMBUS_AddrCallback
void HAL_FMPSMBUS_AddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
Slave Address Match callback.
Definition stm32f4xx_hal_fmpsmbus.c:1779
HAL_FMPSMBUS_SlaveRxCpltCallback
void HAL_FMPSMBUS_SlaveRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Slave Rx Transfer completed callback.
Definition stm32f4xx_hal_fmpsmbus.c:1761
HAL_FMPSMBUS_SlaveTxCpltCallback
void HAL_FMPSMBUS_SlaveTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Slave Tx Transfer completed callback.
Definition stm32f4xx_hal_fmpsmbus.c:1745
HAL_FMPSMBUS_Slave_Transmit_IT
HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Transmit in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1226
HAL_FMPSMBUS_Master_Transmit_IT
HAL_StatusTypeDef HAL_FMPSMBUS_Master_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Transmit in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:926
HAL_FMPSMBUS_DisableListen_IT
HAL_StatusTypeDef HAL_FMPSMBUS_DisableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Disable the Address listen mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1420
HAL_FMPSMBUS_DisableAlert_IT
HAL_StatusTypeDef HAL_FMPSMBUS_DisableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Disable the FMPSMBUS alert mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1463
HAL_FMPSMBUS_Slave_Receive_IT
HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Receive in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1324
HAL_FMPSMBUS_EnableListen_IT
HAL_StatusTypeDef HAL_FMPSMBUS_EnableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Enable the Address listen mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1404
HAL_FMPSMBUS_EnableAlert_IT
HAL_StatusTypeDef HAL_FMPSMBUS_EnableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
Enable the FMPSMBUS alert mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1444
HAL_FMPSMBUS_Master_Receive_IT
HAL_StatusTypeDef HAL_FMPSMBUS_Master_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Receive in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1064
HAL_FMPSMBUS_Master_Abort_IT
HAL_StatusTypeDef HAL_FMPSMBUS_Master_Abort_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress)
Abort a master/host FMPSMBUS process communication with Interrupt.
Definition stm32f4xx_hal_fmpsmbus.c:1161
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition stm32f4xx_hal_def.h:39
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition stm32f4xx_hal_def.h:50
stm32f4xx_hal_fmpsmbus_ex.h
Header file of FMPSMBUS HAL Extended module.
FMPSMBUS_HandleTypeDef
Definition stm32f4xx_hal_fmpsmbus.h:139
FMPSMBUS_HandleTypeDef::pBuffPtr
uint8_t * pBuffPtr
Definition stm32f4xx_hal_fmpsmbus.h:144
FMPSMBUS_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition stm32f4xx_hal_fmpsmbus.h:158
FMPSMBUS_HandleTypeDef::XferCount
__IO uint16_t XferCount
Definition stm32f4xx_hal_fmpsmbus.h:148
FMPSMBUS_HandleTypeDef::XferOptions
__IO uint32_t XferOptions
Definition stm32f4xx_hal_fmpsmbus.h:150
FMPSMBUS_HandleTypeDef::Init
FMPSMBUS_InitTypeDef Init
Definition stm32f4xx_hal_fmpsmbus.h:142
FMPSMBUS_HandleTypeDef::Instance
FMPI2C_TypeDef * Instance
Definition stm32f4xx_hal_fmpsmbus.h:140
FMPSMBUS_HandleTypeDef::PreviousState
__IO uint32_t PreviousState
Definition stm32f4xx_hal_fmpsmbus.h:152
FMPSMBUS_HandleTypeDef::State
__IO uint32_t State
Definition stm32f4xx_hal_fmpsmbus.h:156
FMPSMBUS_HandleTypeDef::XferSize
uint16_t XferSize
Definition stm32f4xx_hal_fmpsmbus.h:146
FMPSMBUS_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition stm32f4xx_hal_fmpsmbus.h:154
FMPSMBUS_InitTypeDef
Definition stm32f4xx_hal_fmpsmbus.h:49
FMPSMBUS_InitTypeDef::PeripheralMode
uint32_t PeripheralMode
Definition stm32f4xx_hal_fmpsmbus.h:81
FMPSMBUS_InitTypeDef::SMBusTimeout
uint32_t SMBusTimeout
Definition stm32f4xx_hal_fmpsmbus.h:84
FMPSMBUS_InitTypeDef::GeneralCallMode
uint32_t GeneralCallMode
Definition stm32f4xx_hal_fmpsmbus.h:72
FMPSMBUS_InitTypeDef::OwnAddress2
uint32_t OwnAddress2
Definition stm32f4xx_hal_fmpsmbus.h:65
FMPSMBUS_InitTypeDef::AddressingMode
uint32_t AddressingMode
Definition stm32f4xx_hal_fmpsmbus.h:59
FMPSMBUS_InitTypeDef::NoStretchMode
uint32_t NoStretchMode
Definition stm32f4xx_hal_fmpsmbus.h:75
FMPSMBUS_InitTypeDef::DualAddressMode
uint32_t DualAddressMode
Definition stm32f4xx_hal_fmpsmbus.h:62
FMPSMBUS_InitTypeDef::Timing
uint32_t Timing
Definition stm32f4xx_hal_fmpsmbus.h:50
FMPSMBUS_InitTypeDef::OwnAddress1
uint32_t OwnAddress1
Definition stm32f4xx_hal_fmpsmbus.h:56
FMPSMBUS_InitTypeDef::PacketErrorCheckMode
uint32_t PacketErrorCheckMode
Definition stm32f4xx_hal_fmpsmbus.h:78
FMPSMBUS_InitTypeDef::AnalogFilter
uint32_t AnalogFilter
Definition stm32f4xx_hal_fmpsmbus.h:53
FMPSMBUS_InitTypeDef::OwnAddress2Masks
uint32_t OwnAddress2Masks
Definition stm32f4xx_hal_fmpsmbus.h:68