20#ifndef STM32F4xx_HAL_IWDG_H
21#define STM32F4xx_HAL_IWDG_H
79#define IWDG_PRESCALER_4 0x00000000u
80#define IWDG_PRESCALER_8 IWDG_PR_PR_0
81#define IWDG_PRESCALER_16 IWDG_PR_PR_1
82#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0)
83#define IWDG_PRESCALER_64 IWDG_PR_PR_2
84#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0)
85#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1)
104#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
112#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
153#define IWDG_KEY_RELOAD 0x0000AAAAu
154#define IWDG_KEY_ENABLE 0x0000CCCCu
155#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u
156#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u
172#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
179#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
186#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
187 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
188 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
189 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
190 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
191 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
192 ((__PRESCALER__) == IWDG_PRESCALER_256))
199#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
Initialize the IWDG according to the specified parameters in the IWDG_InitTypeDef and start watchdog....
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
Refresh the IWDG.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
IWDG Handle Structure definition.
IWDG Init structure definition.