STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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stm32f4xx_hal_nor.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F4xx_HAL_NOR_H
21#define STM32F4xx_HAL_NOR_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#if defined(FMC_Bank1) || defined(FSMC_Bank1)
28
29/* Includes ------------------------------------------------------------------*/
30#if defined(FSMC_Bank1)
31#include "stm32f4xx_ll_fsmc.h"
32#else
33#include "stm32f4xx_ll_fmc.h"
34#endif /* FMC_Bank1 */
35
44/* Exported typedef ----------------------------------------------------------*/
52typedef enum
53{
54 HAL_NOR_STATE_RESET = 0x00U,
55 HAL_NOR_STATE_READY = 0x01U,
56 HAL_NOR_STATE_BUSY = 0x02U,
57 HAL_NOR_STATE_ERROR = 0x03U,
58 HAL_NOR_STATE_PROTECTED = 0x04U
59} HAL_NOR_StateTypeDef;
60
64typedef enum
65{
66 HAL_NOR_STATUS_SUCCESS = 0U,
67 HAL_NOR_STATUS_ONGOING,
68 HAL_NOR_STATUS_ERROR,
69 HAL_NOR_STATUS_TIMEOUT
70} HAL_NOR_StatusTypeDef;
71
75typedef struct
76{
77 uint16_t Manufacturer_Code;
79 uint16_t Device_Code1;
80
81 uint16_t Device_Code2;
82
83 uint16_t Device_Code3;
87} NOR_IDTypeDef;
88
92typedef struct
93{
98 uint16_t CFI_1;
99
100 uint16_t CFI_2;
101
102 uint16_t CFI_3;
103
104 uint16_t CFI_4;
105} NOR_CFITypeDef;
106
110#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
111typedef struct __NOR_HandleTypeDef
112#else
113typedef struct
114#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
115
116{
117 FMC_NORSRAM_TypeDef *Instance;
119 FMC_NORSRAM_EXTENDED_TypeDef *Extended;
121 FMC_NORSRAM_InitTypeDef Init;
123 HAL_LockTypeDef Lock;
125 __IO HAL_NOR_StateTypeDef State;
127 uint32_t CommandSet;
129#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
130 void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor);
131 void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor);
132#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
133} NOR_HandleTypeDef;
134
135#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
139typedef enum
140{
141 HAL_NOR_MSP_INIT_CB_ID = 0x00U,
142 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U
143} HAL_NOR_CallbackIDTypeDef;
144
148typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
149#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
154/* Exported constants --------------------------------------------------------*/
155/* Exported macro ------------------------------------------------------------*/
163#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
164#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \
165 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \
166 (__HANDLE__)->MspInitCallback = NULL; \
167 (__HANDLE__)->MspDeInitCallback = NULL; \
168 } while(0)
169#else
170#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
171#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
176/* Exported functions --------------------------------------------------------*/
185/* Initialization/de-initialization functions ********************************/
186HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing,
187 FMC_NORSRAM_TimingTypeDef *ExtTiming);
188HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
189void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
190void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
191void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
200/* I/O operation functions ***************************************************/
201HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
202HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
203HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
204HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
205
206HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
207 uint32_t uwBufferSize);
208HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
209 uint32_t uwBufferSize);
210
211HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
212HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
213HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
214
215#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
216/* NOR callback registering/unregistering */
217HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
218 pNOR_CallbackTypeDef pCallback);
219HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
220#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
229/* NOR Control functions *****************************************************/
230HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
231HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
240/* NOR State functions ********************************************************/
241HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor);
242HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
251/* Private types -------------------------------------------------------------*/
252/* Private variables ---------------------------------------------------------*/
253/* Private constants ---------------------------------------------------------*/
257/* NOR device IDs addresses */
258#define MC_ADDRESS ((uint16_t)0x0000)
259#define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
260#define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
261#define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
262
263/* NOR CFI IDs addresses */
264#define CFI1_ADDRESS ((uint16_t)0x0061)
265#define CFI2_ADDRESS ((uint16_t)0x0062)
266#define CFI3_ADDRESS ((uint16_t)0x0063)
267#define CFI4_ADDRESS ((uint16_t)0x0064)
268
269/* NOR operation wait timeout */
270#define NOR_TMEOUT ((uint16_t)0xFFFF)
271
272/* NOR memory data width */
273#define NOR_MEMORY_8B ((uint8_t)0x00)
274#define NOR_MEMORY_16B ((uint8_t)0x01)
275
276/* NOR memory device read/write start address */
277#define NOR_MEMORY_ADRESS1 (0x60000000U)
278#define NOR_MEMORY_ADRESS2 (0x64000000U)
279#define NOR_MEMORY_ADRESS3 (0x68000000U)
280#define NOR_MEMORY_ADRESS4 (0x6C000000U)
285/* Private macros ------------------------------------------------------------*/
296#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
297 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
298 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
299 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
300
307#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
308 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
309 __DSB(); \
310 } while(0)
311
324#endif /* FMC_Bank1 || FSMC_Bank1 */
325
326#ifdef __cplusplus
327}
328#endif
329
330#endif /* STM32F4xx_HAL_NOR_H */
HAL_StatusTypeDef
HAL Status structures definition
HAL_LockTypeDef
HAL Lock structures definition