stm32f4xx_hal_smbus.h

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/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_SMBUS_H
#define __STM32F4xx_HAL_SMBUS_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal_def.h"
 
/* Exported types ------------------------------------------------------------*/
typedef struct
{
  uint32_t ClockSpeed;           
  uint32_t AnalogFilter;         
  uint32_t OwnAddress1;          
  uint32_t AddressingMode;       
  uint32_t DualAddressMode;      
  uint32_t OwnAddress2;          
  uint32_t GeneralCallMode;      
  uint32_t NoStretchMode;        
  uint32_t PacketErrorCheckMode; 
  uint32_t PeripheralMode;       
} SMBUS_InitTypeDef;
 
typedef enum
{
 
  HAL_SMBUS_STATE_RESET             = 0x00U,   
  HAL_SMBUS_STATE_READY             = 0x20U,   
  HAL_SMBUS_STATE_BUSY              = 0x24U,   
  HAL_SMBUS_STATE_BUSY_TX           = 0x21U,   
  HAL_SMBUS_STATE_BUSY_RX           = 0x22U,   
  HAL_SMBUS_STATE_LISTEN            = 0x28U,   
  HAL_SMBUS_STATE_BUSY_TX_LISTEN    = 0x29U,   
  HAL_SMBUS_STATE_BUSY_RX_LISTEN    = 0x2AU,   
  HAL_SMBUS_STATE_ABORT             = 0x60U,   
  HAL_SMBUS_STATE_TIMEOUT           = 0xA0U,   
  HAL_SMBUS_STATE_ERROR             = 0xE0U    
} HAL_SMBUS_StateTypeDef;
 
typedef enum
{
  HAL_SMBUS_MODE_NONE               = 0x00U,   
  HAL_SMBUS_MODE_MASTER             = 0x10U,   
  HAL_SMBUS_MODE_SLAVE              = 0x20U,   
} HAL_SMBUS_ModeTypeDef;
 
typedef struct __SMBUS_HandleTypeDef
{
  I2C_TypeDef                 *Instance;        
  SMBUS_InitTypeDef             Init;           
  uint8_t                       *pBuffPtr;      
  uint16_t                      XferSize;       
  __IO uint16_t                 XferCount;      
  __IO uint32_t                 XferOptions;    
  __IO uint32_t                 PreviousState;  
  HAL_LockTypeDef               Lock;           
  __IO HAL_SMBUS_StateTypeDef   State;          
  __IO HAL_SMBUS_ModeTypeDef    Mode;           
  __IO uint32_t                 ErrorCode;      
  __IO uint32_t                 Devaddress;     
  __IO uint32_t                 EventCount;     
  uint8_t                       XferPEC;        
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
  void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           
  void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           
  void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            
  void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            
  void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);             
  void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              
  void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              
  void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                  
  void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              
  void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);  
  void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                
  void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              
#endif  /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
} SMBUS_HandleTypeDef;
 
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
typedef enum
{
  HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    
  HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    
  HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    
  HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    
  HAL_SMBUS_LISTEN_COMPLETE_CB_ID         = 0x04U,    
  HAL_SMBUS_ERROR_CB_ID                   = 0x07U,    
  HAL_SMBUS_ABORT_CB_ID                   = 0x08U,    
  HAL_SMBUS_MSPINIT_CB_ID                 = 0x09U,    
  HAL_SMBUS_MSPDEINIT_CB_ID               = 0x0AU     
} HAL_SMBUS_CallbackIDTypeDef;
 
typedef  void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); 
typedef  void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); 
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
 
/* Exported constants --------------------------------------------------------*/
#define HAL_SMBUS_ERROR_NONE              0x00000000U    
#define HAL_SMBUS_ERROR_BERR              0x00000001U    
#define HAL_SMBUS_ERROR_ARLO              0x00000002U    
#define HAL_SMBUS_ERROR_AF                0x00000004U    
#define HAL_SMBUS_ERROR_OVR               0x00000008U    
#define HAL_SMBUS_ERROR_TIMEOUT           0x00000010U    
#define HAL_SMBUS_ERROR_ALERT             0x00000020U    
#define HAL_SMBUS_ERROR_PECERR            0x00000040U    
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
#define HAL_SMBUS_ERROR_INVALID_CALLBACK  0x00000080U    
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
 
#define SMBUS_ANALOGFILTER_ENABLE        0x00000000U
#define SMBUS_ANALOGFILTER_DISABLE       I2C_FLTR_ANOFF
#define SMBUS_ADDRESSINGMODE_7BIT        0x00004000U
#define SMBUS_ADDRESSINGMODE_10BIT       (I2C_OAR1_ADDMODE | 0x00004000U)
#define SMBUS_DUALADDRESS_DISABLE        0x00000000U
#define SMBUS_DUALADDRESS_ENABLE         I2C_OAR2_ENDUAL
#define SMBUS_GENERALCALL_DISABLE        0x00000000U
#define SMBUS_GENERALCALL_ENABLE         I2C_CR1_ENGC
#define SMBUS_NOSTRETCH_DISABLE          0x00000000U
#define SMBUS_NOSTRETCH_ENABLE           I2C_CR1_NOSTRETCH
#define SMBUS_PEC_DISABLE                0x00000000U
#define SMBUS_PEC_ENABLE                 I2C_CR1_ENPEC
#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST        (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP)
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE       I2C_CR1_SMBUS
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP   (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)
#define SMBUS_DIRECTION_RECEIVE           0x00000000U
#define SMBUS_DIRECTION_TRANSMIT          0x00000001U
#define  SMBUS_FIRST_FRAME                       0x00000001U
#define  SMBUS_NEXT_FRAME                        0x00000002U
#define  SMBUS_FIRST_AND_LAST_FRAME_NO_PEC       0x00000003U
#define  SMBUS_LAST_FRAME_NO_PEC                 0x00000004U
#define  SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC     0x00000005U
#define  SMBUS_LAST_FRAME_WITH_PEC               0x00000006U
#define SMBUS_IT_BUF                      I2C_CR2_ITBUFEN
#define SMBUS_IT_EVT                      I2C_CR2_ITEVTEN
#define SMBUS_IT_ERR                      I2C_CR2_ITERREN
#define SMBUS_FLAG_SMBALERT               0x00018000U
#define SMBUS_FLAG_TIMEOUT                0x00014000U
#define SMBUS_FLAG_PECERR                 0x00011000U
#define SMBUS_FLAG_OVR                    0x00010800U
#define SMBUS_FLAG_AF                     0x00010400U
#define SMBUS_FLAG_ARLO                   0x00010200U
#define SMBUS_FLAG_BERR                   0x00010100U
#define SMBUS_FLAG_TXE                    0x00010080U
#define SMBUS_FLAG_RXNE                   0x00010040U
#define SMBUS_FLAG_STOPF                  0x00010010U
#define SMBUS_FLAG_ADD10                  0x00010008U
#define SMBUS_FLAG_BTF                    0x00010004U
#define SMBUS_FLAG_ADDR                   0x00010002U
#define SMBUS_FLAG_SB                     0x00010001U
#define SMBUS_FLAG_DUALF                  0x00100080U
#define SMBUS_FLAG_SMBHOST                0x00100040U
#define SMBUS_FLAG_SMBDEFAULT             0x00100020U
#define SMBUS_FLAG_GENCALL                0x00100010U
#define SMBUS_FLAG_TRA                    0x00100004U
#define SMBUS_FLAG_BUSY                   0x00100002U
#define SMBUS_FLAG_MSL                    0x00100001U
/* Exported macro ------------------------------------------------------------*/
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)          do{                                                  \
                                                                (__HANDLE__)->State = HAL_SMBUS_STATE_RESET;     \
                                                                (__HANDLE__)->MspInitCallback = NULL;            \
                                                                (__HANDLE__)->MspDeInitCallback = NULL;          \
                                                              } while(0)
#else
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
#endif
 
#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
 
#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 
#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \
                                                 ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
 
#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK))
 
#define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__)    \
  do{                                           \
    __IO uint32_t tmpreg = 0x00U;               \
    tmpreg = (__HANDLE__)->Instance->SR1;       \
    tmpreg = (__HANDLE__)->Instance->SR2;       \
    UNUSED(tmpreg);                             \
  } while(0)
 
#define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__)    \
  do{                                           \
    __IO uint32_t tmpreg = 0x00U;               \
    tmpreg = (__HANDLE__)->Instance->SR1;       \
    (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE;  \
    UNUSED(tmpreg);                             \
  } while(0)
 
#define __HAL_SMBUS_ENABLE(__HANDLE__)           ((__HANDLE__)->Instance->CR1 |=  I2C_CR1_PE)
 
#define __HAL_SMBUS_DISABLE(__HANDLE__)          ((__HANDLE__)->Instance->CR1 &=  ~I2C_CR1_PE)
 
#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__)    (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK))
 
/* Exported functions --------------------------------------------------------*/
/* Initialization/de-initialization functions  **********************************/
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
 
/* Callbacks Register/UnRegister functions  ************************************/
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);
 
HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
 
/* IO operation functions  *****************************************************/
/******* Blocking mode: Polling */
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
/******* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 
HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
 
/****** Filter Configuration functions  */
#if  defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
#endif
/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus);
 
/* Peripheral State, mode and Errors functions  **************************************************/
HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus);
uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
 
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
#define SMBUS_FLAG_MASK  0x0000FFFFU
/* Private macros ------------------------------------------------------------*/
#define SMBUS_FREQRANGE(__PCLK__)                  ((__PCLK__)/1000000U)
 
#define SMBUS_RISE_TIME(__FREQRANGE__)             ( ((__FREQRANGE__) + 1U))
 
#define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__)  (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
 
#define SMBUS_7BIT_ADD_WRITE(__ADDRESS__)          ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
 
#define SMBUS_7BIT_ADD_READ(__ADDRESS__)           ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
 
#define SMBUS_10BIT_ADDRESS(__ADDRESS__)           ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
 
#define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__)      ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
 
#define SMBUS_10BIT_HEADER_READ(__ADDRESS__)       ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
 
#define SMBUS_GET_PEC_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
 
#define SMBUS_GET_PEC_VALUE(__HANDLE__)             ((__HANDLE__)->XferPEC)
 
#if  defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
#define IS_SMBUS_ANALOG_FILTER(FILTER)             (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
                                                    ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
#define IS_SMBUS_DIGITAL_FILTER(FILTER)            ((FILTER) <= 0x0000000FU)
#endif
#define IS_SMBUS_ADDRESSING_MODE(ADDRESS)          (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) || \
                                                    ((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT))
 
#define IS_SMBUS_DUAL_ADDRESS(ADDRESS)             (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
                                                    ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
 
#define IS_SMBUS_GENERAL_CALL(CALL)                (((CALL) == SMBUS_GENERALCALL_DISABLE)    || \
                                                    ((CALL) == SMBUS_GENERALCALL_ENABLE))
 
#define IS_SMBUS_NO_STRETCH(STRETCH)               (((STRETCH) == SMBUS_NOSTRETCH_DISABLE)   || \
                                                    ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
 
#define IS_SMBUS_PEC(PEC)                          (((PEC) == SMBUS_PEC_DISABLE) || \
                                                     ((PEC) == SMBUS_PEC_ENABLE))
 
#define IS_SMBUS_PERIPHERAL_MODE(MODE)             (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST)      || \
                                                    ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE)     || \
                                                    ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
 
#define IS_SMBUS_CLOCK_SPEED(SPEED)                (((SPEED) > 0U) && ((SPEED) <= 100000U))
 
#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1)            (((ADDRESS1) & 0xFFFFFC00U) == 0U)
 
#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2)            (((ADDRESS2) & 0xFFFFFF01U) == 0U)
 
#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME)                   || \
                                                    ((REQUEST) == SMBUS_NEXT_FRAME)                    || \
                                                    ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC)   || \
                                                    ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC)             || \
                                                    ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
                                                    ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
 
/* Private Functions ---------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
 
 
#endif /* __STM32F4xx_HAL_SMBUS_H */