- Generated on Wed Feb 26 2025 for STM32F4xx HAL Documentation by
1.12.0
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STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros | |
| #define | CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ |
| #define | CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ |
| #define | CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ |
| #define | CRYP_PHASE_READY 0x00000001U |
| #define | CRYP_PHASE_PROCESS 0x00000002U |
| #define | CRYP_OPERATINGMODE_ENCRYPT 0x00000000U |
| #define | CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0 |
| #define | CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1 |
| #define | CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE |
| #define | CRYP_PHASE_INIT 0x00000000U |
| #define | CRYP_PHASE_HEADER AES_CR_GCMPH_0 |
| #define | CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1 |
| #define | CRYP_PHASE_FINAL AES_CR_GCMPH |
| #define | CRYP_CCM_CTR1_0 0x07FFFFFFU |
| #define | CRYP_CCM_CTR1_1 0xFFFFFF00U |
| #define | CRYP_CCM_CTR1_2 0x00000001U |
| #define CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ |
#include <stm32f4xx_hal_cryp.c>
Definition at line 279 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt_DMA(), and CRYP_AES_Decrypt_IT().
| #define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ |
#include <stm32f4xx_hal_cryp.c>
Definition at line 280 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process_DMA(), and CRYP_AESGCM_Process_IT().
| #define CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ |
#include <stm32f4xx_hal_cryp.c>
Definition at line 281 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_GCMCCM_SetHeaderPhase_DMA().
| #define CRYP_PHASE_READY 0x00000001U |
#include <stm32f4xx_hal_cryp.c>
CRYP peripheral is ready for initialization.
Definition at line 283 of file stm32f4xx_hal_cryp.c.
Referenced by HAL_CRYP_DeInit(), HAL_CRYP_Init(), and HAL_CRYP_SetConfig().
| #define CRYP_PHASE_PROCESS 0x00000002U |
#include <stm32f4xx_hal_cryp.c>
CRYP peripheral is in processing phase
Definition at line 284 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), CRYP_AES_Decrypt_IT(), CRYP_AES_Encrypt(), CRYP_AES_Encrypt_IT(), CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), CRYP_AESGCM_Process_IT(), CRYP_GCMCCM_SetHeaderPhase_IT(), HAL_CRYP_Decrypt(), HAL_CRYP_Decrypt_DMA(), HAL_CRYP_Decrypt_IT(), HAL_CRYP_Encrypt(), HAL_CRYP_Encrypt_DMA(), and HAL_CRYP_Encrypt_IT().
| #define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U |
#include <stm32f4xx_hal_cryp.c>
Encryption mode(Mode 1)
Definition at line 287 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_Workaround(), HAL_CRYP_Encrypt(), HAL_CRYP_Encrypt_DMA(), and HAL_CRYP_Encrypt_IT().
| #define CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0 |
#include <stm32f4xx_hal_cryp.c>
Key derivation mode only used when performing ECB and CBC decryptions (Mode 2)
Definition at line 288 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), and CRYP_AES_Decrypt_IT().
| #define CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1 |
#include <stm32f4xx_hal_cryp.c>
Decryption (Mode 3)
Definition at line 289 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), CRYP_AES_Decrypt_IT(), CRYP_Workaround(), HAL_CRYP_Decrypt(), HAL_CRYP_Decrypt_DMA(), and HAL_CRYP_Decrypt_IT().
| #define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE |
#include <stm32f4xx_hal_cryp.c>
Key derivation and decryption only used when performing ECB and CBC decryptions (Mode 4)
Definition at line 290 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), and CRYP_AES_Decrypt_IT().
| #define CRYP_PHASE_INIT 0x00000000U |
#include <stm32f4xx_hal_cryp.c>
GCM/GMAC (or CCM) init phase
Definition at line 291 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), and CRYP_AESGCM_Process_IT().
| #define CRYP_PHASE_HEADER AES_CR_GCMPH_0 |
#include <stm32f4xx_hal_cryp.c>
GCM/GMAC or CCM header phase
Definition at line 292 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process_IT(), CRYP_GCMCCM_SetHeaderPhase(), CRYP_GCMCCM_SetHeaderPhase_DMA(), CRYP_Workaround(), and HAL_CRYP_IRQHandler().
| #define CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1 |
#include <stm32f4xx_hal_cryp.c>
GCM(/CCM) payload phase
Definition at line 293 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), CRYP_AESGCM_Process_IT(), and CRYP_GCMCCM_SetHeaderPhase_IT().
| #define CRYP_PHASE_FINAL AES_CR_GCMPH |
#include <stm32f4xx_hal_cryp.c>
GCM/GMAC or CCM final phase
Definition at line 294 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_Workaround().
| #define CRYP_CCM_CTR1_0 0x07FFFFFFU |
#include <stm32f4xx_hal_cryp.c>
Definition at line 305 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
| #define CRYP_CCM_CTR1_1 0xFFFFFF00U |
#include <stm32f4xx_hal_cryp.c>
Definition at line 306 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
| #define CRYP_CCM_CTR1_2 0x00000001U |
#include <stm32f4xx_hal_cryp.c>
Definition at line 307 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
1.12.0