STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros
AHB1 Peripheral Clock Enable Disable Status
STM32F4xx_HAL_Driver » RCC » RCC Exported Macros

Get the enable or disable status of the AHB1 peripheral clock. More...

Collaboration diagram for AHB1 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()
 

Detailed Description

Get the enable or disable status of the AHB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_GPIOA_IS_CLK_ENABLED

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)

Definition at line 444 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_IS_CLK_ENABLED

#define __HAL_RCC_GPIOB_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)

Definition at line 445 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_IS_CLK_ENABLED

#define __HAL_RCC_GPIOC_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)

Definition at line 446 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_IS_CLK_ENABLED

#define __HAL_RCC_GPIOH_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)

Definition at line 447 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_IS_CLK_ENABLED

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)

Definition at line 448 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_IS_CLK_ENABLED

#define __HAL_RCC_DMA2_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)

Definition at line 449 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOA_IS_CLK_DISABLED

#define __HAL_RCC_GPIOA_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)

Definition at line 451 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOB_IS_CLK_DISABLED

#define __HAL_RCC_GPIOB_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)

Definition at line 452 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOC_IS_CLK_DISABLED

#define __HAL_RCC_GPIOC_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)

Definition at line 453 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_GPIOH_IS_CLK_DISABLED

#define __HAL_RCC_GPIOH_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)

Definition at line 454 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_IS_CLK_DISABLED

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)

Definition at line 455 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_IS_CLK_DISABLED

#define __HAL_RCC_DMA2_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)

Definition at line 456 of file stm32f4xx_hal_rcc.h.