STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros
APB1 Peripheral Clock Enable Disable Status
STM32F4xx_HAL_Driver » RCC » RCC Exported Macros

Get the enable or disable status of the APB1 peripheral clock. More...

Collaboration diagram for APB1 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_TIM5_IS_CLK_ENABLED()
 
#define __HAL_RCC_WWDG_IS_CLK_ENABLED()
 
#define __HAL_RCC_SPI2_IS_CLK_ENABLED()
 
#define __HAL_RCC_USART2_IS_CLK_ENABLED()
 
#define __HAL_RCC_I2C1_IS_CLK_ENABLED()
 
#define __HAL_RCC_I2C2_IS_CLK_ENABLED()
 
#define __HAL_RCC_PWR_IS_CLK_ENABLED()
 
#define __HAL_RCC_TIM5_IS_CLK_DISABLED()
 
#define __HAL_RCC_WWDG_IS_CLK_DISABLED()
 
#define __HAL_RCC_SPI2_IS_CLK_DISABLED()
 
#define __HAL_RCC_USART2_IS_CLK_DISABLED()
 
#define __HAL_RCC_I2C1_IS_CLK_DISABLED()
 
#define __HAL_RCC_I2C2_IS_CLK_DISABLED()
 
#define __HAL_RCC_PWR_IS_CLK_DISABLED()
 

Detailed Description

Get the enable or disable status of the APB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_TIM5_IS_CLK_ENABLED

#define __HAL_RCC_TIM5_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)

Definition at line 536 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_WWDG_IS_CLK_ENABLED

#define __HAL_RCC_WWDG_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)

Definition at line 537 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SPI2_IS_CLK_ENABLED

#define __HAL_RCC_SPI2_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)

Definition at line 538 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART2_IS_CLK_ENABLED

#define __HAL_RCC_USART2_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)

Definition at line 539 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_I2C1_IS_CLK_ENABLED

#define __HAL_RCC_I2C1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)

Definition at line 540 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_I2C2_IS_CLK_ENABLED

#define __HAL_RCC_I2C2_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)

Definition at line 541 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_PWR_IS_CLK_ENABLED

#define __HAL_RCC_PWR_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)

Definition at line 542 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM5_IS_CLK_DISABLED

#define __HAL_RCC_TIM5_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)

Definition at line 544 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_WWDG_IS_CLK_DISABLED

#define __HAL_RCC_WWDG_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)

Definition at line 545 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SPI2_IS_CLK_DISABLED

#define __HAL_RCC_SPI2_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)

Definition at line 546 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART2_IS_CLK_DISABLED

#define __HAL_RCC_USART2_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)

Definition at line 547 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_I2C1_IS_CLK_DISABLED

#define __HAL_RCC_I2C1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)

Definition at line 548 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_I2C2_IS_CLK_DISABLED

#define __HAL_RCC_I2C2_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)

Definition at line 549 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_PWR_IS_CLK_DISABLED

#define __HAL_RCC_PWR_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)

Definition at line 550 of file stm32f4xx_hal_rcc.h.

Referenced by HAL_RCC_OscConfig().