STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros
APB2 Peripheral Clock Enable Disable Status
STM32F4xx_HAL_Driver » RCC » RCC Exported Macros

Get the enable or disable status of the APB2 peripheral clock. More...

Collaboration diagram for APB2 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_TIM1_IS_CLK_ENABLED()
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()
 
#define __HAL_RCC_USART6_IS_CLK_ENABLED()
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()
 
#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()
 
#define __HAL_RCC_TIM9_IS_CLK_ENABLED()
 
#define __HAL_RCC_TIM11_IS_CLK_ENABLED()
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()
 
#define __HAL_RCC_USART6_IS_CLK_DISABLED()
 
#define __HAL_RCC_ADC1_IS_CLK_DISABLED()
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()
 
#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()
 
#define __HAL_RCC_TIM9_IS_CLK_DISABLED()
 
#define __HAL_RCC_TIM11_IS_CLK_DISABLED()
 

Detailed Description

Get the enable or disable status of the APB2 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_TIM1_IS_CLK_ENABLED

#define __HAL_RCC_TIM1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)

Definition at line 638 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART1_IS_CLK_ENABLED

#define __HAL_RCC_USART1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)

Definition at line 639 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART6_IS_CLK_ENABLED

#define __HAL_RCC_USART6_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)

Definition at line 640 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_ADC1_IS_CLK_ENABLED

#define __HAL_RCC_ADC1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)

Definition at line 641 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SPI1_IS_CLK_ENABLED

#define __HAL_RCC_SPI1_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)

Definition at line 642 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SYSCFG_IS_CLK_ENABLED

#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)

Definition at line 643 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM9_IS_CLK_ENABLED

#define __HAL_RCC_TIM9_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)

Definition at line 644 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM11_IS_CLK_ENABLED

#define __HAL_RCC_TIM11_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)

Definition at line 645 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM1_IS_CLK_DISABLED

#define __HAL_RCC_TIM1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)

Definition at line 647 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART1_IS_CLK_DISABLED

#define __HAL_RCC_USART1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)

Definition at line 648 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_USART6_IS_CLK_DISABLED

#define __HAL_RCC_USART6_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)

Definition at line 649 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_ADC1_IS_CLK_DISABLED

#define __HAL_RCC_ADC1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)

Definition at line 650 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SPI1_IS_CLK_DISABLED

#define __HAL_RCC_SPI1_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)

Definition at line 651 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_SYSCFG_IS_CLK_DISABLED

#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)

Definition at line 652 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM9_IS_CLK_DISABLED

#define __HAL_RCC_TIM9_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)

Definition at line 653 of file stm32f4xx_hal_rcc.h.

◆ __HAL_RCC_TIM11_IS_CLK_DISABLED

#define __HAL_RCC_TIM11_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc.h>

Value:
((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)

Definition at line 654 of file stm32f4xx_hal_rcc.h.