20#ifndef STM32F4xx_HAL_CAN_H
21#define STM32F4xx_HAL_CAN_H
212#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
213typedef struct __CAN_HandleTypeDef
218 CAN_TypeDef *Instance;
224 __IO uint32_t ErrorCode;
227#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
228 void (* TxMailbox0CompleteCallback)(
struct __CAN_HandleTypeDef *hcan);
229 void (* TxMailbox1CompleteCallback)(
struct __CAN_HandleTypeDef *hcan);
230 void (* TxMailbox2CompleteCallback)(
struct __CAN_HandleTypeDef *hcan);
231 void (* TxMailbox0AbortCallback)(
struct __CAN_HandleTypeDef *hcan);
232 void (* TxMailbox1AbortCallback)(
struct __CAN_HandleTypeDef *hcan);
233 void (* TxMailbox2AbortCallback)(
struct __CAN_HandleTypeDef *hcan);
234 void (* RxFifo0MsgPendingCallback)(
struct __CAN_HandleTypeDef *hcan);
235 void (* RxFifo0FullCallback)(
struct __CAN_HandleTypeDef *hcan);
236 void (* RxFifo1MsgPendingCallback)(
struct __CAN_HandleTypeDef *hcan);
237 void (* RxFifo1FullCallback)(
struct __CAN_HandleTypeDef *hcan);
238 void (* SleepCallback)(
struct __CAN_HandleTypeDef *hcan);
239 void (* WakeUpFromRxMsgCallback)(
struct __CAN_HandleTypeDef *hcan);
240 void (* ErrorCallback)(
struct __CAN_HandleTypeDef *hcan);
242 void (* MspInitCallback)(
struct __CAN_HandleTypeDef *hcan);
243 void (* MspDeInitCallback)(
struct __CAN_HandleTypeDef *hcan);
248#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
254 HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U,
255 HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U,
256 HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U,
257 HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U,
258 HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U,
259 HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U,
260 HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U,
261 HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U,
262 HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U,
263 HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U,
264 HAL_CAN_SLEEP_CB_ID = 0x0AU,
265 HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU,
266 HAL_CAN_ERROR_CB_ID = 0x0CU,
268 HAL_CAN_MSPINIT_CB_ID = 0x0DU,
269 HAL_CAN_MSPDEINIT_CB_ID = 0x0EU,
271} HAL_CAN_CallbackIDTypeDef;
292#define HAL_CAN_ERROR_NONE (0x00000000U)
293#define HAL_CAN_ERROR_EWG (0x00000001U)
294#define HAL_CAN_ERROR_EPV (0x00000002U)
295#define HAL_CAN_ERROR_BOF (0x00000004U)
296#define HAL_CAN_ERROR_STF (0x00000008U)
297#define HAL_CAN_ERROR_FOR (0x00000010U)
298#define HAL_CAN_ERROR_ACK (0x00000020U)
299#define HAL_CAN_ERROR_BR (0x00000040U)
300#define HAL_CAN_ERROR_BD (0x00000080U)
301#define HAL_CAN_ERROR_CRC (0x00000100U)
302#define HAL_CAN_ERROR_RX_FOV0 (0x00000200U)
303#define HAL_CAN_ERROR_RX_FOV1 (0x00000400U)
304#define HAL_CAN_ERROR_TX_ALST0 (0x00000800U)
305#define HAL_CAN_ERROR_TX_TERR0 (0x00001000U)
306#define HAL_CAN_ERROR_TX_ALST1 (0x00002000U)
307#define HAL_CAN_ERROR_TX_TERR1 (0x00004000U)
308#define HAL_CAN_ERROR_TX_ALST2 (0x00008000U)
309#define HAL_CAN_ERROR_TX_TERR2 (0x00010000U)
310#define HAL_CAN_ERROR_TIMEOUT (0x00020000U)
311#define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U)
312#define HAL_CAN_ERROR_NOT_READY (0x00080000U)
313#define HAL_CAN_ERROR_NOT_STARTED (0x00100000U)
314#define HAL_CAN_ERROR_PARAM (0x00200000U)
316#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
317#define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U)
319#define HAL_CAN_ERROR_INTERNAL (0x00800000U)
328#define CAN_INITSTATUS_FAILED (0x00000000U)
329#define CAN_INITSTATUS_SUCCESS (0x00000001U)
337#define CAN_MODE_NORMAL (0x00000000U)
338#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM)
339#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM)
340#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))
350#define CAN_SJW_1TQ (0x00000000U)
351#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0)
352#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1)
353#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW)
361#define CAN_BS1_1TQ (0x00000000U)
362#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0)
363#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1)
364#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))
365#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2)
366#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))
367#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))
368#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))
369#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3)
370#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))
371#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))
372#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))
373#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))
374#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))
375#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))
376#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1)
384#define CAN_BS2_1TQ (0x00000000U)
385#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0)
386#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1)
387#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))
388#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2)
389#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))
390#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))
391#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2)
399#define CAN_FILTERMODE_IDMASK (0x00000000U)
400#define CAN_FILTERMODE_IDLIST (0x00000001U)
408#define CAN_FILTERSCALE_16BIT (0x00000000U)
409#define CAN_FILTERSCALE_32BIT (0x00000001U)
417#define CAN_FILTER_DISABLE (0x00000000U)
418#define CAN_FILTER_ENABLE (0x00000001U)
426#define CAN_FILTER_FIFO0 (0x00000000U)
427#define CAN_FILTER_FIFO1 (0x00000001U)
435#define CAN_ID_STD (0x00000000U)
436#define CAN_ID_EXT (0x00000004U)
444#define CAN_RTR_DATA (0x00000000U)
445#define CAN_RTR_REMOTE (0x00000002U)
453#define CAN_RX_FIFO0 (0x00000000U)
454#define CAN_RX_FIFO1 (0x00000001U)
462#define CAN_TX_MAILBOX0 (0x00000001U)
463#define CAN_TX_MAILBOX1 (0x00000002U)
464#define CAN_TX_MAILBOX2 (0x00000004U)
473#define CAN_FLAG_RQCP0 (0x00000500U)
474#define CAN_FLAG_TXOK0 (0x00000501U)
475#define CAN_FLAG_ALST0 (0x00000502U)
476#define CAN_FLAG_TERR0 (0x00000503U)
477#define CAN_FLAG_RQCP1 (0x00000508U)
478#define CAN_FLAG_TXOK1 (0x00000509U)
479#define CAN_FLAG_ALST1 (0x0000050AU)
480#define CAN_FLAG_TERR1 (0x0000050BU)
481#define CAN_FLAG_RQCP2 (0x00000510U)
482#define CAN_FLAG_TXOK2 (0x00000511U)
483#define CAN_FLAG_ALST2 (0x00000512U)
484#define CAN_FLAG_TERR2 (0x00000513U)
485#define CAN_FLAG_TME0 (0x0000051AU)
486#define CAN_FLAG_TME1 (0x0000051BU)
487#define CAN_FLAG_TME2 (0x0000051CU)
488#define CAN_FLAG_LOW0 (0x0000051DU)
489#define CAN_FLAG_LOW1 (0x0000051EU)
490#define CAN_FLAG_LOW2 (0x0000051FU)
493#define CAN_FLAG_FF0 (0x00000203U)
494#define CAN_FLAG_FOV0 (0x00000204U)
495#define CAN_FLAG_FF1 (0x00000403U)
496#define CAN_FLAG_FOV1 (0x00000404U)
499#define CAN_FLAG_INAK (0x00000100U)
500#define CAN_FLAG_SLAK (0x00000101U)
501#define CAN_FLAG_ERRI (0x00000102U)
502#define CAN_FLAG_WKU (0x00000103U)
503#define CAN_FLAG_SLAKI (0x00000104U)
506#define CAN_FLAG_EWG (0x00000300U)
507#define CAN_FLAG_EPV (0x00000301U)
508#define CAN_FLAG_BOF (0x00000302U)
518#define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE)
521#define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0)
522#define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0)
523#define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0)
524#define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1)
525#define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1)
526#define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1)
529#define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE)
530#define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE)
533#define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE)
534#define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE)
535#define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE)
536#define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE)
537#define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE)
555#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
556#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \
557 (__HANDLE__)->State = HAL_CAN_STATE_RESET; \
558 (__HANDLE__)->MspInitCallback = NULL; \
559 (__HANDLE__)->MspDeInitCallback = NULL; \
562#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
572#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
581#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
589#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__))
597#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
598 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
599 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
600 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
601 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
602 (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
628#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
629 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
630 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
631 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
632 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
654#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
689 const uint8_t aData[], uint32_t *pTxMailbox);
778#define CAN_FLAG_MASK (0x000000FFU)
788#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
789 ((MODE) == CAN_MODE_LOOPBACK)|| \
790 ((MODE) == CAN_MODE_SILENT) || \
791 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
792#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \
793 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
794#define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \
795 ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \
796 ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \
797 ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \
798 ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \
799 ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \
800 ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \
801 ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ))
802#define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \
803 ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \
804 ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \
805 ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ))
806#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
807#define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
808#define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
809#define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
810#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
811 ((MODE) == CAN_FILTERMODE_IDLIST))
812#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
813 ((SCALE) == CAN_FILTERSCALE_32BIT))
814#define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \
815 ((ACTIVATION) == CAN_FILTER_ENABLE))
816#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
817 ((FIFO) == CAN_FILTER_FIFO1))
818#define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \
819 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \
820 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
821#define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | \
823#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
824#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
825#define IS_CAN_DLC(DLC) ((DLC) <= 8U)
826#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
827 ((IDTYPE) == CAN_ID_EXT))
828#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
829#define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1))
830#define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \
831 CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \
832 CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \
833 CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \
834 CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \
835 CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \
836 CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR))
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
Deinitializes the CAN peripheral registers to their default reset values.
void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan)
DeInitializes the CAN MSP.
HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
Initializes the CAN peripheral according to the specified parameters in the CAN_InitStruct.
void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan)
Initializes the CAN MSP.
HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig)
Configures the CAN reception filter according to the specified parameters in the CAN_FilterInitStruct...
uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox)
Return timestamp of Tx message sent, if time triggered communication mode is enabled.
uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan)
Return Tx Mailboxes free level: number of free Tx Mailboxes.
HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan)
Start the CAN module.
uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
Check if a transmission request is pending on the selected Tx Mailboxes.
uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan)
Check is sleep mode is active.
uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo)
Return Rx FIFO fill level.
HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes)
Abort transmission requests.
HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan)
Stop the CAN module and enable access to configuration registers.
HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox)
Add a message to the first free Tx mailbox and activate the corresponding transmission request.
HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
Request the sleep mode (low power) entry. When returning from this function, Sleep mode will be enter...
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
Wake up from sleep mode. When returning with HAL_OK status from this function, Sleep mode is exited.
HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[])
Get an CAN frame from the Rx FIFO zone into the message RAM.
HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs)
Disable interrupts.
HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs)
Enable interrupts.
void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
Handles CAN interrupt request.
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
Rx FIFO 0 message pending callback.
void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan)
Rx FIFO 1 full callback.
void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 0 complete callback.
void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
Error CAN callback.
void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 1 Cancellation callback.
void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan)
WakeUp from Rx message callback.
void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 1 complete callback.
void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan)
Rx FIFO 0 full callback.
void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 2 complete callback.
void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan)
Sleep callback.
void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 2 Cancellation callback.
void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan)
Transmission Mailbox 0 Cancellation callback.
void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan)
Rx FIFO 1 message pending callback.
HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan)
Reset the CAN error code.
HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan)
Return the CAN state.
uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan)
Return the CAN error code.
HAL_CAN_StateTypeDef
HAL State structures definition.
@ HAL_CAN_STATE_LISTENING
@ HAL_CAN_STATE_SLEEP_ACTIVE
@ HAL_CAN_STATE_SLEEP_PENDING
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
CAN filter configuration structure definition.
uint32_t FilterActivation
uint32_t FilterMaskIdHigh
uint32_t FilterFIFOAssignment
uint32_t SlaveStartFilterBank
CAN handle Structure definition.
CAN init structure definition.
FunctionalState AutoBusOff
FunctionalState ReceiveFifoLocked
FunctionalState TimeTriggeredMode
FunctionalState AutoRetransmission
FunctionalState AutoWakeUp
FunctionalState TransmitFifoPriority