20#ifndef STM32F4xx_HAL_DAC_H
21#define STM32F4xx_HAL_DAC_H
62#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
63typedef struct __DAC_HandleTypeDef
80#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
81 void (* ConvCpltCallbackCh1)(
struct __DAC_HandleTypeDef *hdac);
82 void (* ConvHalfCpltCallbackCh1)(
struct __DAC_HandleTypeDef *hdac);
83 void (* ErrorCallbackCh1)(
struct __DAC_HandleTypeDef *hdac);
84 void (* DMAUnderrunCallbackCh1)(
struct __DAC_HandleTypeDef *hdac);
85#if defined(DAC_CHANNEL2_SUPPORT)
86 void (* ConvCpltCallbackCh2)(
struct __DAC_HandleTypeDef *hdac);
87 void (* ConvHalfCpltCallbackCh2)(
struct __DAC_HandleTypeDef *hdac);
88 void (* ErrorCallbackCh2)(
struct __DAC_HandleTypeDef *hdac);
89 void (* DMAUnderrunCallbackCh2)(
struct __DAC_HandleTypeDef *hdac);
92 void (* MspInitCallback)(
struct __DAC_HandleTypeDef *hdac);
93 void (* MspDeInitCallback)(
struct __DAC_HandleTypeDef *hdac);
111#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
117 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U,
118 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U,
119 HAL_DAC_CH1_ERROR_ID = 0x02U,
120 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U,
121#if defined(DAC_CHANNEL2_SUPPORT)
122 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U,
123 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U,
124 HAL_DAC_CH2_ERROR_ID = 0x06U,
125 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U,
127 HAL_DAC_MSPINIT_CB_ID = 0x08U,
128 HAL_DAC_MSPDEINIT_CB_ID = 0x09U,
129 HAL_DAC_ALL_CB_ID = 0x0AU
130} HAL_DAC_CallbackIDTypeDef;
151#define HAL_DAC_ERROR_NONE 0x00U
152#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U
153#if defined(DAC_CHANNEL2_SUPPORT)
154#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U
156#define HAL_DAC_ERROR_DMA 0x04U
157#define HAL_DAC_ERROR_TIMEOUT 0x08U
158#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
159#define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U
169#define DAC_TRIGGER_NONE 0x00000000UL
170#define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1)
171#define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)
172#define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)
173#define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1)
174#define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1)
175#define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1)
176#define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)
177#define DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1 | DAC_CR_TEN1)
186#define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
187#define DAC_OUTPUTBUFFER_DISABLE (DAC_CR_BOFF1)
196#define DAC_CHANNEL_1 0x00000000U
197#if defined(DAC_CHANNEL2_SUPPORT)
198#define DAC_CHANNEL_2 0x00000010U
207#define DAC_ALIGN_12B_R 0x00000000U
208#define DAC_ALIGN_12B_L 0x00000004U
209#define DAC_ALIGN_8B_R 0x00000008U
218#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
219#if defined(DAC_CHANNEL2_SUPPORT)
220#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
230#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
231#if defined(DAC_CHANNEL2_SUPPORT)
232#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
253#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
254#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
255 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \
256 (__HANDLE__)->MspInitCallback = NULL; \
257 (__HANDLE__)->MspDeInitCallback = NULL; \
260#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
268#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
269 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
276#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
277 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
283#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
285#if defined(DAC_CHANNEL2_SUPPORT)
290#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
297#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
307#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
317#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
327#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\
328 & (__INTERRUPT__)) == (__INTERRUPT__))
338#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
348#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
359#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
360 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
362#if defined(DAC_CHANNEL2_SUPPORT)
363#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
364 ((CHANNEL) == DAC_CHANNEL_2))
366#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
369#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
370 ((ALIGN) == DAC_ALIGN_12B_L) || \
371 ((ALIGN) == DAC_ALIGN_8B_R))
373#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
418#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
421 pDAC_CallbackTypeDef pCallback);
void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
Initialize the DAC MSP.
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
Initialize the DAC peripheral according to the specified parameters in the DAC_InitStruct and initial...
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
Deinitialize the DAC peripheral registers to their default reset values.
void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
DeInitialize the DAC MSP.
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
Disables DAC and stop conversion of channel.
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
Enables DAC and starts conversion of channel.
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
Conversion half DMA transfer callback in non-blocking mode for Channel1.
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
Disables DAC and stop conversion of channel.
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
Set the specified data holding register value for DAC channel.
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, uint32_t Alignment)
Enables DAC and starts conversion of channel.
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
Error DAC callback for Channel1.
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
Handles DAC interrupt request This function uses the interruption of DMA underrun.
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
Conversion complete callback in non-blocking mode for Channel1.
void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
DMA underrun DAC callback for channel1.
uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
Returns the last data output value of the selected DAC channel.
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
Configures the selected DAC channel.
HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
return the DAC handle state
uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
Return the DAC error code.
HAL_DAC_StateTypeDef
HAL State structures definition.
void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
DMA conversion complete callback.
void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
DMA half transfer complete callback.
void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
DMA error callback.
Header file of DAC HAL Extended module.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
HAL_LockTypeDef
HAL Lock structures definition
DAC Configuration regular Channel structure definition.
uint32_t DAC_OutputBuffer
DAC handle Structure definition.
__IO HAL_DAC_StateTypeDef State
DMA_HandleTypeDef * DMA_Handle2
DMA_HandleTypeDef * DMA_Handle1
DMA handle Structure definition.