STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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stm32f4xx_hal_flash_ex.c
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1
61/* Includes ------------------------------------------------------------------*/
62#include "stm32f4xx_hal.h"
63
73#ifdef HAL_FLASH_MODULE_ENABLED
74
75/* Private typedef -----------------------------------------------------------*/
76/* Private define ------------------------------------------------------------*/
80#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
85/* Private macro -------------------------------------------------------------*/
86/* Private variables ---------------------------------------------------------*/
95/* Private function prototypes -----------------------------------------------*/
99/* Option bytes control */
100static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
101static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
102static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
103static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
104static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
105static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
106static uint8_t FLASH_OB_GetUser(void);
107static uint16_t FLASH_OB_GetWRP(void);
108static uint8_t FLASH_OB_GetRDP(void);
109static uint8_t FLASH_OB_GetBOR(void);
110
111#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
112 defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
113 defined(STM32F423xx)
114static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
115static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
116#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
117 STM32F413xx || STM32F423xx */
118
119#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
120static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
121static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
122static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
123#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
124
125extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
130/* Exported functions --------------------------------------------------------*/
161{
163 uint32_t index = 0U;
164
165 /* Process Locked */
167
168 /* Check the parameters */
170
171 /* Wait for last operation to be completed */
173
174 if (status == HAL_OK)
175 {
176 /*Initialization of SectorError variable*/
177 *SectorError = 0xFFFFFFFFU;
178
179 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
180 {
181 /*Mass erase to be done*/
182 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
183
184 /* Wait for last operation to be completed */
186
187 /* if the erase operation is completed, disable the MER Bit */
188 FLASH->CR &= (~FLASH_MER_BIT);
189 }
190 else
191 {
192 /* Check the parameters */
193 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
194
195 /* Erase by sector by sector to be done*/
196 for (index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
197 {
198 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
199
200 /* Wait for last operation to be completed */
202
203 /* If the erase operation is completed, disable the SER and SNB Bits */
204 CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
205
206 if (status != HAL_OK)
207 {
208 /* In case of error, stop erase procedure and return the faulty sector*/
209 *SectorError = index;
210 break;
211 }
212 }
213 }
214 /* Flush the caches to be sure of the data consistency */
216 }
217
218 /* Process Unlocked */
220
221 return status;
222}
223
232{
233 HAL_StatusTypeDef status = HAL_OK;
234
235 /* Check the parameters */
237
238 /* Enable End of FLASH Operation interrupt */
240
241 /* Enable Error source interrupt */
243
244 /* Clear pending flags (if any) */
247
248 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
249 {
250 /*Mass erase to be done*/
252 pFlash.Bank = pEraseInit->Banks;
253 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
254 }
255 else
256 {
257 /* Erase by sector to be done*/
258
259 /* Check the parameters */
260 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
261
263 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
264 pFlash.Sector = pEraseInit->Sector;
265 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
266
267 /*Erase 1st sector and wait for IT*/
268 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
269 }
270
271 return status;
272}
273
282{
284
285 /* Process Locked */
287
288 /* Check the parameters */
290
291 /*Write protection configuration*/
292 if ((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
293 {
295 if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
296 {
297 /*Enable of Write protection on the selected Sector*/
298 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
299 }
300 else
301 {
302 /*Disable of Write protection on the selected Sector*/
303 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
304 }
305 }
306
307 /*Read protection configuration*/
308 if ((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
309 {
310 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
311 }
312
313 /*USER configuration*/
314 if ((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
315 {
316 status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_IWDG_SW,
317 pOBInit->USERConfig & OB_STOP_NO_RST,
318 pOBInit->USERConfig & OB_STDBY_NO_RST);
319 }
320
321 /*BOR Level configuration*/
322 if ((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
323 {
324 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
325 }
326
327 /* Process Unlocked */
329
330 return status;
331}
332
341{
343
344 /*Get WRP*/
345 pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
346
347 /*Get RDP Level*/
348 pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
349
350 /*Get USER*/
351 pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
352
353 /*Get BOR Level*/
354 pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
355}
356
357#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
358 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
359 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
360 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
361 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
370{
372
373 /* Check the parameters */
374 assert_param(IS_OBEX(pAdvOBInit->OptionType));
375
376 /*Program PCROP option byte*/
377 if (((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
378 {
379 /* Check the parameters */
381 if ((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
382 {
383 /*Enable of Write protection on the selected Sector*/
384#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
385 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
386 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
387 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
388#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
389 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
390#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
391 STM32F413xx || STM32F423xx */
392 }
393 else
394 {
395 /*Disable of Write protection on the selected Sector*/
396#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
397 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
398 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
399 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
400#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
401 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
402#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
403 STM32F413xx || STM32F423xx */
404 }
405 }
406
407#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
408 /*Program BOOT config option byte*/
409 if (((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
410 {
411 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
412 }
413#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
414
415 return status;
416}
417
426{
427#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
428 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
429 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
430 /*Get Sector*/
431 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
432#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
433 /*Get Sector for Bank1*/
434 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
435
436 /*Get Sector for Bank2*/
437 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
438
439 /*Get Boot config OB*/
440 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
441#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
442 STM32F413xx || STM32F423xx */
443}
444
458{
459 uint8_t optiontmp = 0xFF;
460
461 /* Mask SPRMOD bit */
462 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
463
464 /* Update Option Byte */
465 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
466
467 return HAL_OK;
468}
469
483{
484 uint8_t optiontmp = 0xFF;
485
486 /* Mask SPRMOD bit */
487 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
488
489 /* Update Option Byte */
490 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
491
492 return HAL_OK;
493}
494#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
495 STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
496 STM32F413xx || STM32F423xx */
497
498#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
504uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
505{
506 /* Return the FLASH write protection Register value */
507 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
508}
509#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
510
515#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
537static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
538{
539 /* Check the parameters */
540 assert_param(IS_VOLTAGERANGE(VoltageRange));
542
543 /* if the previous operation is completed, proceed to erase all sectors */
544 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
545
546 if (Banks == FLASH_BANK_BOTH)
547 {
548 /* bank1 & bank2 will be erased*/
549 FLASH->CR |= FLASH_MER_BIT;
550 }
551 else if (Banks == FLASH_BANK_1)
552 {
553 /*Only bank1 will be erased*/
554 FLASH->CR |= FLASH_CR_MER1;
555 }
556 else
557 {
558 /*Only bank2 will be erased*/
559 FLASH->CR |= FLASH_CR_MER2;
560 }
561 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
562}
563
581void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
582{
583 uint32_t tmp_psize = 0U;
584
585 /* Check the parameters */
587 assert_param(IS_VOLTAGERANGE(VoltageRange));
588
589 if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
590 {
591 tmp_psize = FLASH_PSIZE_BYTE;
592 }
593 else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
594 {
595 tmp_psize = FLASH_PSIZE_HALF_WORD;
596 }
597 else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
598 {
599 tmp_psize = FLASH_PSIZE_WORD;
600 }
601 else
602 {
603 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
604 }
605
606 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
607 if (Sector > FLASH_SECTOR_11)
608 {
609 Sector += 4U;
610 }
611 /* If the previous operation is completed, proceed to erase the sector */
612 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
613 FLASH->CR |= tmp_psize;
614 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
615 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
616 FLASH->CR |= FLASH_CR_STRT;
617}
618
641static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
642{
643 HAL_StatusTypeDef status = HAL_OK;
644
645 /* Check the parameters */
646 assert_param(IS_OB_WRP_SECTOR(WRPSector));
648
649 /* Wait for last operation to be completed */
651
652 if (status == HAL_OK)
653 {
654 if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
655 (WRPSector < OB_WRP_SECTOR_12))
656 {
657 if (WRPSector == OB_WRP_SECTOR_All)
658 {
659 /*Write protection on all sector of BANK1*/
660 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~(WRPSector >> 12));
661 }
662 else
663 {
664 /*Write protection done on sectors of BANK1*/
665 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
666 }
667 }
668 else
669 {
670 /*Write protection done on sectors of BANK2*/
671 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
672 }
673
674 /*Write protection on all sector of BANK2*/
675 if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
676 {
677 /* Wait for last operation to be completed */
679
680 if (status == HAL_OK)
681 {
682 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
683 }
684 }
685
686 }
687 return status;
688}
689
712static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
713{
714 HAL_StatusTypeDef status = HAL_OK;
715
716 /* Check the parameters */
717 assert_param(IS_OB_WRP_SECTOR(WRPSector));
719
720 /* Wait for last operation to be completed */
722
723 if (status == HAL_OK)
724 {
725 if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
726 (WRPSector < OB_WRP_SECTOR_12))
727 {
728 if (WRPSector == OB_WRP_SECTOR_All)
729 {
730 /*Write protection on all sector of BANK1*/
731 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
732 }
733 else
734 {
735 /*Write protection done on sectors of BANK1*/
736 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
737 }
738 }
739 else
740 {
741 /*Write protection done on sectors of BANK2*/
742 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
743 }
744
745 /*Write protection on all sector of BANK2*/
746 if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
747 {
748 /* Wait for last operation to be completed */
750
751 if (status == HAL_OK)
752 {
753 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
754 }
755 }
756
757 }
758
759 return status;
760}
761
773static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
774{
775 HAL_StatusTypeDef status = HAL_OK;
776
777 /* Check the parameters */
778 assert_param(IS_OB_BOOT(BootConfig));
779
780 /* Wait for last operation to be completed */
782
783 if (status == HAL_OK)
784 {
785 /* Set Dual Bank Boot */
786 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
787 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
788 }
789
790 return status;
791}
792
813static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
814{
815 HAL_StatusTypeDef status = HAL_OK;
816
818
819 /* Wait for last operation to be completed */
821
822 if (status == HAL_OK)
823 {
824 if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
825 {
826 assert_param(IS_OB_PCROP(SectorBank1));
827 /*Write protection done on sectors of BANK1*/
828 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
829 }
830 else
831 {
832 assert_param(IS_OB_PCROP(SectorBank2));
833 /*Write protection done on sectors of BANK2*/
834 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
835 }
836
837 /*Write protection on all sector of BANK2*/
838 if (Banks == FLASH_BANK_BOTH)
839 {
840 assert_param(IS_OB_PCROP(SectorBank2));
841 /* Wait for last operation to be completed */
843
844 if (status == HAL_OK)
845 {
846 /*Write protection done on sectors of BANK2*/
847 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
848 }
849 }
850
851 }
852
853 return status;
854}
855
856
877static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
878{
879 HAL_StatusTypeDef status = HAL_OK;
880
881 /* Check the parameters */
883
884 /* Wait for last operation to be completed */
886
887 if (status == HAL_OK)
888 {
889 if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
890 {
891 assert_param(IS_OB_PCROP(SectorBank1));
892 /*Write protection done on sectors of BANK1*/
893 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
894 }
895 else
896 {
897 /*Write protection done on sectors of BANK2*/
898 assert_param(IS_OB_PCROP(SectorBank2));
899 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
900 }
901
902 /*Write protection on all sector of BANK2*/
903 if (Banks == FLASH_BANK_BOTH)
904 {
905 assert_param(IS_OB_PCROP(SectorBank2));
906 /* Wait for last operation to be completed */
908
909 if (status == HAL_OK)
910 {
911 /*Write protection done on sectors of BANK2*/
912 *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
913 }
914 }
915
916 }
917
918 return status;
919
920}
921
922#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
923
924#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
925 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
926 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
927 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
928 defined(STM32F423xx)
948static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
949{
950 /* Check the parameters */
951 assert_param(IS_VOLTAGERANGE(VoltageRange));
953
954 /* If the previous operation is completed, proceed to erase all sectors */
955 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
956 FLASH->CR |= FLASH_CR_MER;
957 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
958}
959
977void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
978{
979 uint32_t tmp_psize = 0U;
980
981 /* Check the parameters */
983 assert_param(IS_VOLTAGERANGE(VoltageRange));
984
985 if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
986 {
987 tmp_psize = FLASH_PSIZE_BYTE;
988 }
989 else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
990 {
991 tmp_psize = FLASH_PSIZE_HALF_WORD;
992 }
993 else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
994 {
995 tmp_psize = FLASH_PSIZE_WORD;
996 }
997 else
998 {
999 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
1000 }
1001
1002 /* If the previous operation is completed, proceed to erase the sector */
1003 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
1004 FLASH->CR |= tmp_psize;
1005 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
1006 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
1007 FLASH->CR |= FLASH_CR_STRT;
1008}
1009
1027static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
1028{
1029 HAL_StatusTypeDef status = HAL_OK;
1030
1031 /* Check the parameters */
1032 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1034
1035 /* Wait for last operation to be completed */
1037
1038 if (status == HAL_OK)
1039 {
1040 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
1041 }
1042
1043 return status;
1044}
1045
1063static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
1064{
1065 HAL_StatusTypeDef status = HAL_OK;
1066
1067 /* Check the parameters */
1068 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1070
1071 /* Wait for last operation to be completed */
1073
1074 if (status == HAL_OK)
1075 {
1076 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
1077 }
1078
1079 return status;
1080}
1081#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
1082 STM32F413xx || STM32F423xx */
1083
1084#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
1085 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
1086 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
1097{
1098 HAL_StatusTypeDef status = HAL_OK;
1099
1100 /* Check the parameters */
1101 assert_param(IS_OB_PCROP(Sector));
1102
1103 /* Wait for last operation to be completed */
1105
1106 if (status == HAL_OK)
1107 {
1108 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
1109 }
1110
1111 return status;
1112}
1113
1114
1125{
1126 HAL_StatusTypeDef status = HAL_OK;
1127
1128 /* Check the parameters */
1129 assert_param(IS_OB_PCROP(Sector));
1130
1131 /* Wait for last operation to be completed */
1133
1134 if (status == HAL_OK)
1135 {
1136 *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~Sector);
1137 }
1138
1139 return status;
1140
1141}
1142#endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
1143 STM32F413xx || STM32F423xx */
1144
1158{
1159 HAL_StatusTypeDef status = HAL_OK;
1160
1161 /* Check the parameters */
1163
1164 /* Wait for last operation to be completed */
1166
1167 if (status == HAL_OK)
1168 {
1169 *(__IO uint8_t *)OPTCR_BYTE1_ADDRESS = Level;
1170 }
1171
1172 return status;
1173}
1174
1191static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
1192{
1193 uint8_t optiontmp = 0xFF;
1194 HAL_StatusTypeDef status = HAL_OK;
1195
1196 /* Check the parameters */
1200
1201 /* Wait for last operation to be completed */
1203
1204 if (status == HAL_OK)
1205 {
1206 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
1207 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
1208
1209 /* Update User Option Byte */
1210 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
1211 }
1212
1213 return status;
1214}
1215
1227{
1228 /* Check the parameters */
1230
1231 /* Set the BOR Level */
1232 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
1233 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
1234
1235 return HAL_OK;
1236
1237}
1238
1244static uint8_t FLASH_OB_GetUser(void)
1245{
1246 /* Return the User Option Byte */
1247 return ((uint8_t)(FLASH->OPTCR & 0xE0));
1248}
1249
1254static uint16_t FLASH_OB_GetWRP(void)
1255{
1256 /* Return the FLASH write protection Register value */
1257 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
1258}
1259
1268static uint8_t FLASH_OB_GetRDP(void)
1269{
1270 uint8_t readstatus = OB_RDP_LEVEL_0;
1271
1272 if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
1273 {
1274 readstatus = OB_RDP_LEVEL_2;
1275 }
1276 else if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_0)
1277 {
1278 readstatus = OB_RDP_LEVEL_0;
1279 }
1280 else
1281 {
1282 readstatus = OB_RDP_LEVEL_1;
1283 }
1284
1285 return readstatus;
1286}
1287
1296static uint8_t FLASH_OB_GetBOR(void)
1297{
1298 /* Return the FLASH BOR level */
1299 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
1300}
1301
1307{
1308 /* Flush instruction cache */
1309 if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET)
1310 {
1311 /* Disable instruction cache */
1313 /* Reset instruction cache */
1315 /* Enable instruction cache */
1317 }
1318
1319 /* Flush data cache */
1320 if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
1321 {
1322 /* Disable data cache */
1324 /* Reset data cache */
1326 /* Enable data cache */
1328 }
1329}
1330
1335#endif /* HAL_FLASH_MODULE_ENABLED */
1336
#define OPTIONBYTE_PCROP
#define FLASH_BANK_1
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
Program option bytes.
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
Perform a mass erase or erase the specified FLASH memory sectors.
void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
Get the OBEX byte configuration.
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
Get the Option byte configuration.
HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
Select the Protection Mode.
HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
Deselect the Protection Mode.
HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
Program option bytes.
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled.
void FLASH_FlushCaches(void)
Flush the instruction and data caches.
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
Erase the specified FLASH memory sector.
#define IS_OB_STOP_SOURCE(SOURCE)
#define IS_FLASH_BANK(BANK)
#define IS_OB_PCROP(SECTOR)
#define IS_FLASH_NBSECTORS(NBSECTORS)
#define IS_WRPSTATE(VALUE)
#define IS_OPTIONBYTE(VALUE)
#define IS_OB_STDBY_SOURCE(SOURCE)
#define IS_OB_RDP_LEVEL(LEVEL)
#define IS_FLASH_SECTOR(SECTOR)
#define IS_VOLTAGERANGE(RANGE)
#define IS_PCROPSTATE(VALUE)
#define IS_OBEX(VALUE)
#define IS_OB_BOR_LEVEL(LEVEL)
#define IS_OB_WRP_SECTOR(SECTOR)
#define IS_FLASH_TYPEERASE(VALUE)
#define IS_OB_IWDG_SOURCE(SOURCE)
#define FLASH_MER_BIT
#define OB_IWDG_SW
#define OB_RDP_LEVEL_2
#define OB_RDP_LEVEL_0
#define OB_RDP_LEVEL_1
#define OB_WRP_SECTOR_All
#define OB_STDBY_NO_RST
#define OB_STOP_NO_RST
#define OPTIONBYTE_WRP
#define OPTIONBYTE_RDP
#define OPTIONBYTE_USER
#define OPTIONBYTE_BOR
#define OB_PCROP_STATE_ENABLE
#define FLASH_TIMEOUT_VALUE
static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
Disable the write protection of the desired bank 1 sectors.
static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
Set the read protection level.
static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
Set the BOR Level.
static uint8_t FLASH_OB_GetBOR(void)
Returns the FLASH BOR level.
static uint16_t FLASH_OB_GetWRP(void)
Return the FLASH Write Protection Option Bytes value.
static uint8_t FLASH_OB_GetRDP(void)
Returns the FLASH Read Protection level.
static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
Mass erase of FLASH memory.
static uint8_t FLASH_OB_GetUser(void)
Return the FLASH User Option Byte value.
static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
Enable the read/write protection (PCROP) of the desired sectors.
static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
Enable the write protection of the desired bank 1 sectors.
static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
Disable the read/write protection (PCROP) of the desired sectors.
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
Wait for a FLASH operation to complete.
FLASH_ProcessTypeDef pFlash
#define OB_PCROP_SELECTED
#define OB_PCROP_DESELECTED
#define FLASH_TYPEERASE_MASSERASE
#define FLASH_VOLTAGE_RANGE_3
#define FLASH_VOLTAGE_RANGE_1
#define FLASH_VOLTAGE_RANGE_2
#define OB_WRPSTATE_ENABLE
#define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE()
Disable the FLASH instruction cache.
#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__)
Enable the specified FLASH interrupt.
#define __HAL_FLASH_DATA_CACHE_DISABLE()
Disable the FLASH data cache.
#define __HAL_FLASH_DATA_CACHE_RESET()
Resets the FLASH data Cache.
#define __HAL_FLASH_CLEAR_FLAG(__FLAG__)
Clear the specified FLASH flags.
#define __HAL_FLASH_INSTRUCTION_CACHE_RESET()
Resets the FLASH instruction Cache.
#define __HAL_FLASH_DATA_CACHE_ENABLE()
Enable the FLASH data cache.
#define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE()
Enable the FLASH instruction cache.
@ FLASH_PROC_MASSERASE
@ FLASH_PROC_SECTERASE
#define FLASH_FLAG_PGSERR
#define FLASH_FLAG_PGAERR
#define FLASH_FLAG_WRPERR
#define FLASH_FLAG_PGPERR
#define FLASH_FLAG_OPERR
#define FLASH_FLAG_EOP
#define FLASH_IT_ERR
#define FLASH_IT_EOP
#define OPTCR_BYTE1_ADDRESS
OPTCR register byte 1 (Bits[15:8]) base address.
#define OPTCR_BYTE2_ADDRESS
OPTCR register byte 2 (Bits[23:16]) base address.
#define OPTCR_BYTE0_ADDRESS
OPTCR register byte 0 (Bits[7:0]) base address.
#define OPTCR_BYTE3_ADDRESS
OPTCR register byte 3 (Bits[31:24]) base address.
#define FLASH_PSIZE_DOUBLE_WORD
#define FLASH_PSIZE_BYTE
#define FLASH_PSIZE_WORD
#define FLASH_PSIZE_HALF_WORD
#define assert_param(expr)
This file contains all the functions prototypes for the HAL module driver.
HAL_StatusTypeDef
HAL Status structures definition
@ HAL_ERROR
@ HAL_OK
#define __HAL_UNLOCK(__HANDLE__)
#define __HAL_LOCK(__HANDLE__)
FLASH Advanced Option Bytes Program structure definition.
FLASH Erase structure definition.
FLASH Option Bytes Program structure definition.
FLASH handle Structure definition.
__IO FLASH_ProcedureTypeDef ProcedureOnGoing