20#ifndef __STM32F4xx_HAL_I2C_H
21#define __STM32F4xx_HAL_I2C_H
163#define HAL_I2C_ERROR_NONE 0x00000000U
164#define HAL_I2C_ERROR_BERR 0x00000001U
165#define HAL_I2C_ERROR_ARLO 0x00000002U
166#define HAL_I2C_ERROR_AF 0x00000004U
167#define HAL_I2C_ERROR_OVR 0x00000008U
168#define HAL_I2C_ERROR_DMA 0x00000010U
169#define HAL_I2C_ERROR_TIMEOUT 0x00000020U
170#define HAL_I2C_ERROR_SIZE 0x00000040U
171#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U
172#define HAL_I2C_WRONG_START 0x00000200U
173#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
174#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U
184#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
185typedef struct __I2C_HandleTypeDef
226#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
227 void (* MasterTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
228 void (* MasterRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
229 void (* SlaveTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
230 void (* SlaveRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
231 void (* ListenCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
232 void (* MemTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
233 void (* MemRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
234 void (* ErrorCallback)(
struct __I2C_HandleTypeDef *hi2c);
235 void (* AbortCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
237 void (* AddrCallback)(
struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
239 void (* MspInitCallback)(
struct __I2C_HandleTypeDef *hi2c);
240 void (* MspDeInitCallback)(
struct __I2C_HandleTypeDef *hi2c);
245#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
251 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
252 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
253 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
254 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
255 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
256 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
257 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
258 HAL_I2C_ERROR_CB_ID = 0x07U,
259 HAL_I2C_ABORT_CB_ID = 0x08U,
261 HAL_I2C_MSPINIT_CB_ID = 0x09U,
262 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
264} HAL_I2C_CallbackIDTypeDef;
270typedef void (*pI2C_AddrCallbackTypeDef)(
I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
289#define I2C_DUTYCYCLE_2 0x00000000U
290#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
298#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
299#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
307#define I2C_DUALADDRESS_DISABLE 0x00000000U
308#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
316#define I2C_GENERALCALL_DISABLE 0x00000000U
317#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
325#define I2C_NOSTRETCH_DISABLE 0x00000000U
326#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
334#define I2C_MEMADD_SIZE_8BIT 0x00000001U
335#define I2C_MEMADD_SIZE_16BIT 0x00000010U
343#define I2C_DIRECTION_RECEIVE 0x00000000U
344#define I2C_DIRECTION_TRANSMIT 0x00000001U
352#define I2C_FIRST_FRAME 0x00000001U
353#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
354#define I2C_NEXT_FRAME 0x00000004U
355#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
356#define I2C_LAST_FRAME_NO_STOP 0x00000010U
357#define I2C_LAST_FRAME 0x00000020U
362#define I2C_OTHER_FRAME (0x00AA0000U)
363#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
374#define I2C_IT_BUF I2C_CR2_ITBUFEN
375#define I2C_IT_EVT I2C_CR2_ITEVTEN
376#define I2C_IT_ERR I2C_CR2_ITERREN
385#define I2C_FLAG_OVR 0x00010800U
386#define I2C_FLAG_AF 0x00010400U
387#define I2C_FLAG_ARLO 0x00010200U
388#define I2C_FLAG_BERR 0x00010100U
389#define I2C_FLAG_TXE 0x00010080U
390#define I2C_FLAG_RXNE 0x00010040U
391#define I2C_FLAG_STOPF 0x00010010U
392#define I2C_FLAG_ADD10 0x00010008U
393#define I2C_FLAG_BTF 0x00010004U
394#define I2C_FLAG_ADDR 0x00010002U
395#define I2C_FLAG_SB 0x00010001U
396#define I2C_FLAG_DUALF 0x00100080U
397#define I2C_FLAG_GENCALL 0x00100010U
398#define I2C_FLAG_TRA 0x00100004U
399#define I2C_FLAG_BUSY 0x00100002U
400#define I2C_FLAG_MSL 0x00100001U
419#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
420#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
421 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
422 (__HANDLE__)->MspInitCallback = NULL; \
423 (__HANDLE__)->MspDeInitCallback = NULL; \
426#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
438#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
439#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
450#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
475#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
476 (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
477 (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
489#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
496#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
498 __IO uint32_t tmpreg = 0x00U; \
499 tmpreg = (__HANDLE__)->Instance->SR1; \
500 tmpreg = (__HANDLE__)->Instance->SR2; \
508#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
510 __IO uint32_t tmpreg = 0x00U; \
511 tmpreg = (__HANDLE__)->Instance->SR1; \
512 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
520#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
526#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
550#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
647#define I2C_FLAG_MASK 0x0000FFFFU
648#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U
649#define I2C_MIN_PCLK_FREQ_FAST 4000000U
659#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
660#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
661#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
662#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
663#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
664#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
665#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
666 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
667 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
669#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
670#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
672#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
673#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
674#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
676#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
677#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
682#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
683 ((CYCLE) == I2C_DUTYCYCLE_16_9))
684#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
685 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
686#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
687 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
688#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
689 ((CALL) == I2C_GENERALCALL_ENABLE))
690#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
691 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
692#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
693 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
694#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
695#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
696#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
697#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
698 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
699 ((REQUEST) == I2C_NEXT_FRAME) || \
700 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
701 ((REQUEST) == I2C_LAST_FRAME) || \
702 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
703 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
705#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
706 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
708#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
709#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
@ HAL_I2C_STATE_BUSY_TX_LISTEN
@ HAL_I2C_STATE_BUSY_RX_LISTEN
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
DeInitialize the I2C MSP.
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
Initialize the I2C MSP.
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
Initializes the I2C according to the specified parameters in the I2C_InitTypeDef and initialize the a...
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
DeInitialize the I2C peripheral.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in slave mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Write an amount of data in non-blocking mode with DMA to a specific memory address.
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Read an amount of data in non-blocking mode with Interrupt from a specific memory address.
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Receive in master mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Receive in master mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Write an amount of data in blocking mode to a specific memory address.
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Receive in slave mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Transmit in master mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Transmit in slave mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Receives in master mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Read an amount of data in blocking mode from a specific memory address.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in master mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Transmits in slave mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Receive in slave mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Transmits in master mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Transmit in master mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Reads an amount of data in non-blocking mode with DMA from a specific memory address.
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Write an amount of data in non-blocking mode with Interrupt to a specific memory address.
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Transmit in slave mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
Abort a master or memory I2C IT or DMA process communication with Interrupt.
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
Enable the Address listen mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Receive in slave mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
Checks if target device is ready for communication.
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in slave mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
Disable the Address listen mode with Interrupt.
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
Returns the I2C Master, Slave, Memory or no mode.
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
Return the I2C error code.
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
Return the I2C handle state.
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
This function handles I2C event interrupt request.
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
Master Rx Transfer completed callback.
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
Memory Tx Transfer completed callback.
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
I2C abort callback.
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
I2C error callback.
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
Memory Rx Transfer completed callback.
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
Listen Complete callback.
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
Slave Rx Transfer completed callback.
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
Slave Address Match callback.
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
Master Tx Transfer completed callback.
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
This function handles I2C error interrupt request.
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
Slave Tx Transfer completed callback.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition
HAL_LockTypeDef
HAL Lock structures definition
Header file of I2C HAL Extension module.
__IO HAL_I2C_StateTypeDef State
__IO HAL_I2C_ModeTypeDef Mode
DMA_HandleTypeDef * hdmarx
DMA_HandleTypeDef * hdmatx
__IO uint32_t XferOptions
__IO uint32_t PreviousState
DMA handle Structure definition.