CEC Private Macros

Collaboration diagram for CEC Private Macros:

Macros
#define	IS_CEC_SIGNALFREETIME(__SFT__)
#define	IS_CEC_TOLERANCE(__RXTOL__)
#define	IS_CEC_BRERXSTOP(__BRERXSTOP__)
#define	IS_CEC_BREERRORBITGEN(__ERRORBITGEN__)
#define	IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__)
#define	IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__)
#define	IS_CEC_SFTOP(__SFTOP__)
#define	IS_CEC_LISTENING_MODE(__MODE__)
#define	IS_CEC_MSGSIZE(__SIZE__)
	Check CEC message size. The message size is the payload size: without counting the header, it varies from 0 byte (ping operation, one header only, no payload) to 15 bytes (1 opcode and up to 14 operands following the header).
#define	IS_CEC_OWN_ADDRESS(__ADDRESS__)
	Check CEC device Own Address Register (OAR) setting. OAR address is written in a 15-bit field within CEC_CFGR register.
#define	IS_CEC_ADDRESS(__ADDRESS__)
	Check CEC initiator or destination logical address setting. Initiator and destination addresses are coded over 4 bits.

Detailed Description

Macro Definition Documentation

IS_CEC_SIGNALFREETIME

#define IS_CEC_SIGNALFREETIME

(

__SFT__

)

#include <stm32f4xx_hal_cec.h>

Value:

((__SFT__) <= CEC_CFGR_SFT)

Definition at line 732 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_TOLERANCE

#define IS_CEC_TOLERANCE

(

__RXTOL__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                            (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
                                            ((__RXTOL__) == CEC_EXTENDED_TOLERANCE))

Definition at line 734 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_BRERXSTOP

#define IS_CEC_BRERXSTOP

(

__BRERXSTOP__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                           (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
                                           ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))

Definition at line 737 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_BREERRORBITGEN

#define IS_CEC_BREERRORBITGEN

(

__ERRORBITGEN__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                                (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
                                                ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))

Definition at line 740 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_LBPEERRORBITGEN

#define IS_CEC_LBPEERRORBITGEN

(

__ERRORBITGEN__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                                 (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
                                                 ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))

Definition at line 743 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION

#define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION

(

__ERRORBITGEN__

)

#include <stm32f4xx_hal_cec.h>

Value:

  (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
   ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))

Definition at line 746 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_SFTOP

#define IS_CEC_SFTOP

(

__SFTOP__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                          (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
                                          ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))

Definition at line 750 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_LISTENING_MODE

#define IS_CEC_LISTENING_MODE

(

__MODE__

)

#include <stm32f4xx_hal_cec.h>

Value:

                                             (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
                                             ((__MODE__) == CEC_FULL_LISTENING_MODE))

Definition at line 753 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init().

IS_CEC_MSGSIZE

#define IS_CEC_MSGSIZE

(

__SIZE__

)

#include <stm32f4xx_hal_cec.h>

Value:

((__SIZE__) <= 0x10U)

Check CEC message size. The message size is the payload size: without counting the header, it varies from 0 byte (ping operation, one header only, no payload) to 15 bytes (1 opcode and up to 14 operands following the header).

Parameters

__SIZE__

CEC message size.

Return values

Test	result (TRUE or FALSE).

Definition at line 763 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Transmit_IT().

IS_CEC_OWN_ADDRESS

#define IS_CEC_OWN_ADDRESS

(

__ADDRESS__

)

#include <stm32f4xx_hal_cec.h>

Value:

((__ADDRESS__) <= 0x7FFFU)

Check CEC device Own Address Register (OAR) setting. OAR address is written in a 15-bit field within CEC_CFGR register.

Parameters

__ADDRESS__

CEC own address.

Return values

Test	result (TRUE or FALSE).

Definition at line 770 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Init(), and HAL_CEC_SetDeviceAddress().

IS_CEC_ADDRESS

#define IS_CEC_ADDRESS

(

__ADDRESS__

)

#include <stm32f4xx_hal_cec.h>

Value:

((__ADDRESS__) <= 0xFU)

Check CEC initiator or destination logical address setting. Initiator and destination addresses are coded over 4 bits.

Parameters

__ADDRESS__

CEC initiator or logical address.

Return values

Test	result (TRUE or FALSE).

Definition at line 777 of file stm32f4xx_hal_cec.h.

Referenced by HAL_CEC_Transmit_IT().