STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Header file of CEC HAL module. More...
#include "stm32f4xx_hal_def.h"
Go to the source code of this file.
Data Structures | |
struct | CEC_InitTypeDef |
CEC Init Structure definition. More... | |
struct | CEC_HandleTypeDef |
CEC handle Structure definition. More... | |
Macros | |
#define | HAL_CEC_STATE_RESET ((uint32_t)0x00000000) |
#define | HAL_CEC_STATE_READY ((uint32_t)0x00000020) |
#define | HAL_CEC_STATE_BUSY ((uint32_t)0x00000024) |
#define | HAL_CEC_STATE_BUSY_RX ((uint32_t)0x00000022) |
#define | HAL_CEC_STATE_BUSY_TX ((uint32_t)0x00000021) |
#define | HAL_CEC_STATE_BUSY_RX_TX ((uint32_t)0x00000023) |
#define | HAL_CEC_STATE_ERROR ((uint32_t)0x00000050) |
#define | HAL_CEC_ERROR_NONE (uint32_t) 0x0000U |
#define | HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR |
#define | HAL_CEC_ERROR_BRE CEC_ISR_BRE |
#define | HAL_CEC_ERROR_SBPE CEC_ISR_SBPE |
#define | HAL_CEC_ERROR_LBPE CEC_ISR_LBPE |
#define | HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE |
#define | HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST |
#define | HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR |
#define | HAL_CEC_ERROR_TXERR CEC_ISR_TXERR |
#define | HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE |
#define | CEC_DEFAULT_SFT ((uint32_t)0x00000000U) |
#define | CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U) |
#define | CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U) |
#define | CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U) |
#define | CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U) |
#define | CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U) |
#define | CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U) |
#define | CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U) |
#define | CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U) |
#define | CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL) |
#define | CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U) |
#define | CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP) |
#define | CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) |
#define | CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN) |
#define | CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) |
#define | CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN) |
#define | CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U) |
#define | CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN) |
#define | CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U) |
#define | CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT) |
#define | CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U) |
#define | CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN) |
#define | CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U) |
#define | CEC_INITIATOR_LSB_POS ((uint32_t) 4U) |
#define | CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */ |
#define | CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */ |
#define | CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */ |
#define | CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */ |
#define | CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */ |
#define | CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */ |
#define | CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */ |
#define | CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */ |
#define | CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */ |
#define | CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */ |
#define | CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */ |
#define | CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */ |
#define | CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */ |
#define | CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */ |
#define | CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */ |
#define | CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */ |
#define | CEC_IT_TXACKE CEC_IER_TXACKEIE |
#define | CEC_IT_TXERR CEC_IER_TXERRIE |
#define | CEC_IT_TXUDR CEC_IER_TXUDRIE |
#define | CEC_IT_TXEND CEC_IER_TXENDIE |
#define | CEC_IT_TXBR CEC_IER_TXBRIE |
#define | CEC_IT_ARBLST CEC_IER_ARBLSTIE |
#define | CEC_IT_RXACKE CEC_IER_RXACKEIE |
#define | CEC_IT_LBPE CEC_IER_LBPEIE |
#define | CEC_IT_SBPE CEC_IER_SBPEIE |
#define | CEC_IT_BRE CEC_IER_BREIE |
#define | CEC_IT_RXOVR CEC_IER_RXOVRIE |
#define | CEC_IT_RXEND CEC_IER_RXENDIE |
#define | CEC_IT_RXBR CEC_IER_RXBRIE |
#define | CEC_FLAG_TXACKE CEC_ISR_TXACKE |
#define | CEC_FLAG_TXERR CEC_ISR_TXERR |
#define | CEC_FLAG_TXUDR CEC_ISR_TXUDR |
#define | CEC_FLAG_TXEND CEC_ISR_TXEND |
#define | CEC_FLAG_TXBR CEC_ISR_TXBR |
#define | CEC_FLAG_ARBLST CEC_ISR_ARBLST |
#define | CEC_FLAG_RXACKE CEC_ISR_RXACKE |
#define | CEC_FLAG_LBPE CEC_ISR_LBPE |
#define | CEC_FLAG_SBPE CEC_ISR_SBPE |
#define | CEC_FLAG_BRE CEC_ISR_BRE |
#define | CEC_FLAG_RXOVR CEC_ISR_RXOVR |
#define | CEC_FLAG_RXEND CEC_ISR_RXEND |
#define | CEC_FLAG_RXBR CEC_ISR_RXBR |
#define | CEC_ISR_ALL_ERROR |
#define | CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE) |
#define | CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE) |
#define | __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) |
Reset CEC handle gstate & RxState. | |
#define | __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) |
Checks whether or not the specified CEC interrupt flag is set. | |
#define | __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) |
Clears the interrupt or status flag when raised (write at 1) | |
#define | __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) |
Enables the specified CEC interrupt. | |
#define | __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) |
Disables the specified CEC interrupt. | |
#define | __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) |
Checks whether or not the specified CEC interrupt is enabled. | |
#define | __HAL_CEC_ENABLE(__HANDLE__) |
Enables the CEC device. | |
#define | __HAL_CEC_DISABLE(__HANDLE__) |
Disables the CEC device. | |
#define | __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) |
Set Transmission Start flag. | |
#define | __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) |
Set Transmission End flag. | |
#define | __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) |
Get Transmission Start flag. | |
#define | __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) |
Get Transmission End flag. | |
#define | __HAL_CEC_CLEAR_OAR(__HANDLE__) |
Clear OAR register. | |
#define | __HAL_CEC_SET_OAR(__HANDLE__, __ADDRESS__) |
Set OAR register (without resetting previously set address in case of multi-address mode) To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand. | |
#define | IS_CEC_SIGNALFREETIME(__SFT__) |
#define | IS_CEC_TOLERANCE(__RXTOL__) |
#define | IS_CEC_BRERXSTOP(__BRERXSTOP__) |
#define | IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) |
#define | IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) |
#define | IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) |
#define | IS_CEC_SFTOP(__SFTOP__) |
#define | IS_CEC_LISTENING_MODE(__MODE__) |
#define | IS_CEC_MSGSIZE(__SIZE__) |
Check CEC message size. The message size is the payload size: without counting the header, it varies from 0 byte (ping operation, one header only, no payload) to 15 bytes (1 opcode and up to 14 operands following the header). | |
#define | IS_CEC_OWN_ADDRESS(__ADDRESS__) |
Check CEC device Own Address Register (OAR) setting. OAR address is written in a 15-bit field within CEC_CFGR register. | |
#define | IS_CEC_ADDRESS(__ADDRESS__) |
Check CEC initiator or destination logical address setting. Initiator and destination addresses are coded over 4 bits. | |
Typedefs | |
typedef uint32_t | HAL_CEC_StateTypeDef |
HAL CEC State definition. | |
Functions | |
HAL_StatusTypeDef | HAL_CEC_Init (CEC_HandleTypeDef *hcec) |
Initializes the CEC mode according to the specified parameters in the CEC_InitTypeDef and creates the associated handle . | |
HAL_StatusTypeDef | HAL_CEC_DeInit (CEC_HandleTypeDef *hcec) |
DeInitializes the CEC peripheral. | |
HAL_StatusTypeDef | HAL_CEC_SetDeviceAddress (CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress) |
Initializes the Own Address of the CEC device. | |
void | HAL_CEC_MspInit (CEC_HandleTypeDef *hcec) |
CEC MSP Init. | |
void | HAL_CEC_MspDeInit (CEC_HandleTypeDef *hcec) |
CEC MSP DeInit. | |
HAL_StatusTypeDef | HAL_CEC_Transmit_IT (CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, const uint8_t *pData, uint32_t Size) |
Send data in interrupt mode. | |
uint32_t | HAL_CEC_GetLastReceivedFrameSize (const CEC_HandleTypeDef *hcec) |
Get size of the received frame. | |
void | HAL_CEC_ChangeRxBuffer (CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer) |
Change Rx Buffer. | |
void | HAL_CEC_IRQHandler (CEC_HandleTypeDef *hcec) |
This function handles CEC interrupt requests. | |
void | HAL_CEC_TxCpltCallback (CEC_HandleTypeDef *hcec) |
Tx Transfer completed callback. | |
void | HAL_CEC_RxCpltCallback (CEC_HandleTypeDef *hcec, uint32_t RxFrameSize) |
Rx Transfer completed callback. | |
void | HAL_CEC_ErrorCallback (CEC_HandleTypeDef *hcec) |
CEC error callbacks. | |
HAL_CEC_StateTypeDef | HAL_CEC_GetState (const CEC_HandleTypeDef *hcec) |
return the CEC state | |
uint32_t | HAL_CEC_GetError (const CEC_HandleTypeDef *hcec) |
Return the CEC error code. | |
Header file of CEC HAL module.
Copyright (c) 2016 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
Definition in file stm32f4xx_hal_cec.h.