STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros | |
#define | ETH_MACCR_MASK 0xFFFB7F7CU |
#define | ETH_MACECR_MASK 0x3F077FFFU |
#define | ETH_MACFFR_MASK 0x800007FFU |
#define | ETH_MACWTR_MASK 0x0000010FU |
#define | ETH_MACTFCR_MASK 0xFFFF00F2U |
#define | ETH_MACRFCR_MASK 0x00000003U |
#define | ETH_MTLTQOMR_MASK 0x00000072U |
#define | ETH_MTLRQOMR_MASK 0x0000007BU |
#define | ETH_DMAMR_MASK 0x00007802U |
#define | ETH_DMASBMR_MASK 0x0000D001U |
#define | ETH_DMACCR_MASK 0x00013FFFU |
#define | ETH_DMACTCR_MASK 0x003F1010U |
#define | ETH_DMACRCR_MASK 0x803F0000U |
#define | ETH_MACPMTCSR_MASK |
#define | ETH_SWRESET_TIMEOUT 500U |
#define | ETH_MDIO_BUS_TIMEOUT 1000U |
#define | ETH_DMARXDESC_ERRORS_MASK |
#define | ETH_MAC_US_TICK 1000000U |
#define | ETH_MACTSCR_MASK 0x0087FF2FU |
#define | ETH_PTPTSHR_VALUE 0xFFFFFFFFU |
#define | ETH_PTPTSLR_VALUE 0xBB9ACA00U |
#define | ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U |
#define | ETH_REG_WRITE_DELAY 0x00000001U |
#define | ETH_MACCR_CLEAR_MASK 0xFD20810FU |
#define | ETH_MACFCR_CLEAR_MASK 0x0000FF41U |
#define | ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U |
#define | ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */ |
#define | ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */ |
#define | ETH_DMARXDESC_FRAMELENGTHSHIFT 16U |
#define ETH_MACCR_MASK 0xFFFB7F7CU |
#include <stm32f4xx_hal_eth.c>
Definition at line 197 of file stm32f4xx_hal_eth.c.
#define ETH_MACECR_MASK 0x3F077FFFU |
#include <stm32f4xx_hal_eth.c>
Definition at line 198 of file stm32f4xx_hal_eth.c.
#define ETH_MACFFR_MASK 0x800007FFU |
#include <stm32f4xx_hal_eth.c>
Definition at line 199 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_SetMACFilterConfig().
#define ETH_MACWTR_MASK 0x0000010FU |
#include <stm32f4xx_hal_eth.c>
Definition at line 200 of file stm32f4xx_hal_eth.c.
#define ETH_MACTFCR_MASK 0xFFFF00F2U |
#include <stm32f4xx_hal_eth.c>
Definition at line 201 of file stm32f4xx_hal_eth.c.
#define ETH_MACRFCR_MASK 0x00000003U |
#include <stm32f4xx_hal_eth.c>
Definition at line 202 of file stm32f4xx_hal_eth.c.
#define ETH_MTLTQOMR_MASK 0x00000072U |
#include <stm32f4xx_hal_eth.c>
Definition at line 203 of file stm32f4xx_hal_eth.c.
#define ETH_MTLRQOMR_MASK 0x0000007BU |
#include <stm32f4xx_hal_eth.c>
Definition at line 204 of file stm32f4xx_hal_eth.c.
#define ETH_DMAMR_MASK 0x00007802U |
#include <stm32f4xx_hal_eth.c>
Definition at line 206 of file stm32f4xx_hal_eth.c.
#define ETH_DMASBMR_MASK 0x0000D001U |
#include <stm32f4xx_hal_eth.c>
Definition at line 207 of file stm32f4xx_hal_eth.c.
#define ETH_DMACCR_MASK 0x00013FFFU |
#include <stm32f4xx_hal_eth.c>
Definition at line 208 of file stm32f4xx_hal_eth.c.
#define ETH_DMACTCR_MASK 0x003F1010U |
#include <stm32f4xx_hal_eth.c>
Definition at line 209 of file stm32f4xx_hal_eth.c.
#define ETH_DMACRCR_MASK 0x803F0000U |
#include <stm32f4xx_hal_eth.c>
Definition at line 210 of file stm32f4xx_hal_eth.c.
#define ETH_MACPMTCSR_MASK |
#include <stm32f4xx_hal_eth.c>
Definition at line 211 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_EnterPowerDownMode().
#define ETH_SWRESET_TIMEOUT 500U |
#include <stm32f4xx_hal_eth.c>
Definition at line 215 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_Init().
#define ETH_MDIO_BUS_TIMEOUT 1000U |
#include <stm32f4xx_hal_eth.c>
Definition at line 216 of file stm32f4xx_hal_eth.c.
#define ETH_DMARXDESC_ERRORS_MASK |
#include <stm32f4xx_hal_eth.c>
Definition at line 218 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_GetRxDataErrorCode().
#define ETH_MAC_US_TICK 1000000U |
#include <stm32f4xx_hal_eth.c>
Definition at line 223 of file stm32f4xx_hal_eth.c.
#define ETH_MACTSCR_MASK 0x0087FF2FU |
#include <stm32f4xx_hal_eth.c>
Definition at line 225 of file stm32f4xx_hal_eth.c.
#define ETH_PTPTSHR_VALUE 0xFFFFFFFFU |
#include <stm32f4xx_hal_eth.c>
Definition at line 227 of file stm32f4xx_hal_eth.c.
#define ETH_PTPTSLR_VALUE 0xBB9ACA00U |
#include <stm32f4xx_hal_eth.c>
Definition at line 228 of file stm32f4xx_hal_eth.c.
#define ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U |
#include <stm32f4xx_hal_eth.c>
Definition at line 231 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_SetMDIOClockRange().
#define ETH_REG_WRITE_DELAY 0x00000001U |
#include <stm32f4xx_hal_eth.c>
Definition at line 234 of file stm32f4xx_hal_eth.c.
Referenced by ETH_FlushTransmitFIFO(), ETH_SetDMAConfig(), ETH_SetMACConfig(), HAL_ETH_ExitPowerDownMode(), HAL_ETH_SetHashTable(), HAL_ETH_SetMACFilterConfig(), HAL_ETH_SetRxVLANIdentifier(), HAL_ETH_Start(), HAL_ETH_Start_IT(), HAL_ETH_Stop(), and HAL_ETH_Stop_IT().
#define ETH_MACCR_CLEAR_MASK 0xFD20810FU |
#include <stm32f4xx_hal_eth.c>
Definition at line 237 of file stm32f4xx_hal_eth.c.
Referenced by ETH_SetMACConfig().
#define ETH_MACFCR_CLEAR_MASK 0x0000FF41U |
#include <stm32f4xx_hal_eth.c>
Definition at line 240 of file stm32f4xx_hal_eth.c.
Referenced by ETH_SetMACConfig().
#define ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U |
#include <stm32f4xx_hal_eth.c>
Definition at line 243 of file stm32f4xx_hal_eth.c.
Referenced by ETH_SetDMAConfig().
#define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */ |
#include <stm32f4xx_hal_eth.c>
Definition at line 246 of file stm32f4xx_hal_eth.c.
Referenced by ETH_MACAddressConfig().
#define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */ |
#include <stm32f4xx_hal_eth.c>
Definition at line 247 of file stm32f4xx_hal_eth.c.
Referenced by ETH_MACAddressConfig().
#define ETH_DMARXDESC_FRAMELENGTHSHIFT 16U |
#include <stm32f4xx_hal_eth.c>
Definition at line 250 of file stm32f4xx_hal_eth.c.
Referenced by HAL_ETH_ReadData().