STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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stm32f4xx_hal_pwr_ex.h
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1
18/* Define to prevent recursive inclusion -------------------------------------*/
19#ifndef __STM32F4xx_HAL_PWR_EX_H
20#define __STM32F4xx_HAL_PWR_EX_H
21
22#ifdef __cplusplus
23 extern "C" {
24#endif
25
26/* Includes ------------------------------------------------------------------*/
27#include "stm32f4xx_hal_def.h"
28
37/* Exported types ------------------------------------------------------------*/
38/* Exported constants --------------------------------------------------------*/
42#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
43 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
44
48#define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
49#define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
57#define PWR_FLAG_ODRDY PWR_CSR_ODRDY
58#define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
59#define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
63#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
64
68#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
69#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
70#define PWR_REGULATOR_VOLTAGE_SCALE2 0x00000000U /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
71#else
72#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
73 180 MHz by activating the over-drive mode. */
74#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
75 168 MHz by activating the over-drive mode. */
76#define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
77#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
81#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
82 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
86#define PWR_WAKEUP_PIN2 0x00000080U
87#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
88 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
89#define PWR_WAKEUP_PIN3 0x00000040U
90#endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
91 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
95#endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
96 STM32F413xx || STM32F423xx */
97
102/* Exported macro ------------------------------------------------------------*/
107#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
117#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
118 __IO uint32_t tmpreg = 0x00U; \
119 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
120 /* Delay after an RCC peripheral clock enabling */ \
121 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
122 UNUSED(tmpreg); \
123 } while(0U)
124#else
135#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
136 __IO uint32_t tmpreg = 0x00U; \
137 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
138 /* Delay after an RCC peripheral clock enabling */ \
139 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
140 UNUSED(tmpreg); \
141 } while(0U)
142#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
143
144#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
145 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
149#define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
150#define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
151
155#define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
156#define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
157
168#define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
169#define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
170
183#define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
184
188#define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
189
190#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
195/* Exported functions --------------------------------------------------------*/
207uint32_t HAL_PWREx_GetVoltageRange(void);
209
210#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
211 defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
212 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
213void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
214void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
215void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
216void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
217#endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
218 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
219
220#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
221 defined(STM32F469xx) || defined(STM32F479xx)
224HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
225#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
226
234/* Private types -------------------------------------------------------------*/
235/* Private variables ---------------------------------------------------------*/
236/* Private constants ---------------------------------------------------------*/
244/* ------------- PWR registers bit address in the alias region ---------------*/
245/* --- CR Register ---*/
246/* Alias word address of FPDS bit */
247#define FPDS_BIT_NUMBER PWR_CR_FPDS_Pos
248#define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
250/* Alias word address of ODEN bit */
251#define ODEN_BIT_NUMBER PWR_CR_ODEN_Pos
252#define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
254/* Alias word address of ODSWEN bit */
255#define ODSWEN_BIT_NUMBER PWR_CR_ODSWEN_Pos
256#define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
258/* Alias word address of MRLVDS bit */
259#define MRLVDS_BIT_NUMBER PWR_CR_MRLVDS_Pos
260#define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
262/* Alias word address of LPLVDS bit */
263#define LPLVDS_BIT_NUMBER PWR_CR_LPLVDS_Pos
264#define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
265
273/* --- CSR Register ---*/
274/* Alias word address of BRE bit */
275#define BRE_BIT_NUMBER PWR_CSR_BRE_Pos
276#define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
277
286/* Private macros ------------------------------------------------------------*/
294#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
295 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
296#define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
297 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
298#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
299
300#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
301#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
302 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
303#else
304#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
305 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
306 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
307#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
309#if defined(STM32F446xx)
310#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
311#elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) ||\
312 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
313 defined(STM32F423xx)
314#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
315 ((PIN) == PWR_WAKEUP_PIN3))
316#else
317#define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
318#endif /* STM32F446xx */
335#ifdef __cplusplus
336}
337#endif
338
339
340#endif /* __STM32F4xx_HAL_PWR_EX_H */
void HAL_PWREx_DisableFlashPowerDown(void)
Disables the Flash Power Down in Stop mode.
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
Configures the main internal regulator output voltage.
HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
Enables the Backup Regulator.
uint32_t HAL_PWREx_GetVoltageRange(void)
Return Voltage Scaling Range.
HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
Enters in Under-Drive STOP mode.
HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
Deactivates the Over-Drive mode.
void HAL_PWREx_EnableFlashPowerDown(void)
Enables the Flash Power Down in Stop mode.
HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
Activates the Over-Drive mode.
HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
Disables the Backup Regulator.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition