Peripheral Extended features functions. More...

Collaboration diagram for Peripheral Extended features functions:

Functions
void	HAL_PWREx_EnableFlashPowerDown (void)
	Enables the Flash Power Down in Stop mode.

void	HAL_PWREx_DisableFlashPowerDown (void)
	Disables the Flash Power Down in Stop mode.

HAL_StatusTypeDef	HAL_PWREx_EnableBkUpReg (void)
	Enables the Backup Regulator.

HAL_StatusTypeDef	HAL_PWREx_DisableBkUpReg (void)
	Disables the Backup Regulator.

uint32_t	HAL_PWREx_GetVoltageRange (void)
	Return Voltage Scaling Range.

HAL_StatusTypeDef	HAL_PWREx_ControlVoltageScaling (uint32_t VoltageScaling)
	Configures the main internal regulator output voltage.

HAL_StatusTypeDef	HAL_PWREx_EnableOverDrive (void)
	Activates the Over-Drive mode.

HAL_StatusTypeDef	HAL_PWREx_DisableOverDrive (void)
	Deactivates the Over-Drive mode.

HAL_StatusTypeDef	HAL_PWREx_EnterUnderDriveSTOPMode (uint32_t Regulator, uint8_t STOPEntry)
	Enters in Under-Drive STOP mode.

Detailed Description

Peripheral Extended features functions.

 ===============================================================================
                 ##### Peripheral extended features functions #####
 ===============================================================================

    *** Main and Backup Regulators configuration ***
    ================================================
    [..] 
      (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from 
          the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is 
          retained even in Standby or VBAT mode when the low power backup regulator
          is enabled. It can be considered as an internal EEPROM when VBAT is 
          always present. You can use the HAL_PWREx_EnableBkUpReg() function to 
          enable the low power backup regulator. 

      (+) When the backup domain is supplied by VDD (analog switch connected to VDD) 
          the backup SRAM is powered from VDD which replaces the VBAT power supply to 
          save battery life.

      (+) The backup SRAM is not mass erased by a tamper event. It is read 
          protected to prevent confidential data, such as cryptographic private 
          key, from being accessed. The backup SRAM can be erased only through 
          the Flash interface when a protection level change from level 1 to 
          level 0 is requested. 
      -@- Refer to the description of Read protection (RDP) in the Flash 
          programming manual.

      (+) The main internal regulator can be configured to have a tradeoff between 
          performance and power consumption when the device does not operate at 
          the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() 
          macro which configure VOS bit in PWR_CR register
          
        Refer to the product datasheets for more details.

    *** FLASH Power Down configuration ****
    =======================================
    [..] 
      (+) By setting the FPDS bit in the PWR_CR register by using the 
          HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power 
          down mode when the device enters Stop mode. When the Flash memory 
          is in power down mode, an additional startup delay is incurred when 
          waking up from Stop mode.
          
           (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when the PLL 
           is OFF and the HSI or HSE clock source is selected as system clock. 
           The new value programmed is active only when the PLL is ON.
           When the PLL is OFF, the voltage scale 3 is automatically selected. 
        Refer to the datasheets for more details.

    *** Over-Drive and Under-Drive configuration ****
    =================================================
    [..]         
       (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
           2 operating modes available:
        (++) Normal mode: The CPU and core logic operate at maximum frequency at a given 
             voltage scaling (scale 1, scale 2 or scale 3)
        (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a 
            higher frequency than the normal mode for a given voltage scaling (scale 1,  
            scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
            disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow 
            the sequence described in Reference manual.
             
       (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low power regulator 
           supplies a low power voltage to the 1.2V domain, thus preserving the content of registers 
           and internal SRAM. 2 operating modes are available:
         (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only 
              available when the main regulator or the low power regulator is used in Scale 3 or 
              low voltage mode.
         (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
              available when the main regulator or the low power regulator is in low voltage mode.

Function Documentation

◆ HAL_PWREx_EnableFlashPowerDown()

void HAL_PWREx_EnableFlashPowerDown ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Enables the Flash Power Down in Stop mode.

Return values

None

Definition at line 189 of file stm32f4xx_hal_pwr_ex.c.

References CR_FPDS_BB.

◆ HAL_PWREx_DisableFlashPowerDown()

void HAL_PWREx_DisableFlashPowerDown ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Disables the Flash Power Down in Stop mode.

Return values

None

Definition at line 198 of file stm32f4xx_hal_pwr_ex.c.

References CR_FPDS_BB.

◆ HAL_PWREx_EnableBkUpReg()

HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Enables the Backup Regulator.

Return values

HAL status

Definition at line 141 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_GET_FLAG, CSR_BRE_BB, HAL_GetTick(), HAL_OK, HAL_TIMEOUT, PWR_BKPREG_TIMEOUT_VALUE, and PWR_FLAG_BRR.

◆ HAL_PWREx_DisableBkUpReg()

HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Disables the Backup Regulator.

Return values

HAL status

Definition at line 165 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_GET_FLAG, CSR_BRE_BB, HAL_GetTick(), HAL_OK, HAL_TIMEOUT, PWR_BKPREG_TIMEOUT_VALUE, and PWR_FLAG_BRR.

◆ HAL_PWREx_GetVoltageRange()

uint32_t HAL_PWREx_GetVoltageRange ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Return Voltage Scaling Range.

Return values

The

configured scale for the regulator voltage(VOS bit field). The returned value can be one of the following:

- PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
- PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
- PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode

Definition at line 211 of file stm32f4xx_hal_pwr_ex.c.

◆ HAL_PWREx_ControlVoltageScaling()

HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling ( uint32_t VoltageScaling )

#include <stm32f4xx_hal_pwr_ex.h>

Configures the main internal regulator output voltage.

Parameters

VoltageScaling

specifies the regulator output voltage to achieve a tradeoff between performance and power consumption. This parameter can be one of the following values:

PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, the maximum value of fHCLK is 168 MHz. It can be extended to 180 MHz by activating the over-drive mode.
PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, the maximum value of fHCLK is 144 MHz. It can be extended to,
168 MHz by activating the over-drive mode.
PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode, the maximum value of fHCLK is 120 MHz.

Note

To update the system clock frequency(SYSCLK):

Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
Call the HAL_RCC_OscConfig() to configure the PLL.
Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
Set the new system clock frequency using the HAL_RCC_ClockConfig().

The scale can be modified only when the HSI or HSE clock source is selected as system clock source, otherwise the API returns HAL_ERROR.

When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits value in the PWR_CR1 register are not taken in account.

This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.

The new voltage scale is active only when the PLL is ON.

Return values

HAL Status

Definition at line 288 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_GET_FLAG, __HAL_PWR_VOLTAGESCALING_CONFIG, __HAL_RCC_GET_FLAG, __HAL_RCC_GET_SYSCLK_SOURCE, __HAL_RCC_PLL_DISABLE, __HAL_RCC_PLL_ENABLE, __HAL_RCC_PWR_CLK_ENABLE, assert_param, HAL_ERROR, HAL_GetTick(), HAL_OK, HAL_TIMEOUT, IS_PWR_VOLTAGE_SCALING_RANGE, PLL_TIMEOUT_VALUE, PWR_FLAG_VOSRDY, PWR_VOSRDY_TIMEOUT_VALUE, and RCC_FLAG_PLLRDY.

◆ HAL_PWREx_EnableOverDrive()

HAL_StatusTypeDef HAL_PWREx_EnableOverDrive ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Activates the Over-Drive mode.

Note: This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices. This mode allows the CPU and the core logic to operate at a higher frequency than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).; It is recommended to enter or exit Over-drive mode when the application is not running critical tasks and when the system clock source is either HSI or HSE. During the Over-drive switch activation, no peripheral clocks should be enabled.
The peripheral clocks must be enabled once the Over-drive mode is activated.

Return values

HAL status

Definition at line 413 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_GET_FLAG, __HAL_PWR_OVERDRIVE_ENABLE, __HAL_PWR_OVERDRIVESWITCHING_ENABLE, __HAL_RCC_PWR_CLK_ENABLE, HAL_GetTick(), HAL_OK, HAL_TIMEOUT, PWR_FLAG_ODRDY, PWR_FLAG_ODSWRDY, and PWR_OVERDRIVE_TIMEOUT_VALUE.

◆ HAL_PWREx_DisableOverDrive()

HAL_StatusTypeDef HAL_PWREx_DisableOverDrive ( void )

#include <stm32f4xx_hal_pwr_ex.h>

Deactivates the Over-Drive mode.

Note: This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices. This mode allows the CPU and the core logic to operate at a higher frequency than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).; It is recommended to enter or exit Over-drive mode when the application is not running critical tasks and when the system clock source is either HSI or HSE. During the Over-drive switch activation, no peripheral clocks should be enabled.
The peripheral clocks must be enabled once the Over-drive mode is activated.

Return values

HAL status

Definition at line 460 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_GET_FLAG, __HAL_PWR_OVERDRIVE_DISABLE, __HAL_PWR_OVERDRIVESWITCHING_DISABLE, __HAL_RCC_PWR_CLK_ENABLE, HAL_GetTick(), HAL_OK, HAL_TIMEOUT, PWR_FLAG_ODRDY, PWR_FLAG_ODSWRDY, and PWR_OVERDRIVE_TIMEOUT_VALUE.

◆ HAL_PWREx_EnterUnderDriveSTOPMode()

HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode	(	uint32_t	Regulator,
		uint8_t	STOPEntry )

#include <stm32f4xx_hal_pwr_ex.h>

Enters in Under-Drive STOP mode.

Note: This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx devices.; This mode can be selected only when the Under-Drive is already active; This mode is enabled only with STOP low power mode. In this mode, the 1.2V domain is preserved in reduced leakage mode. This mode is only available when the main regulator or the low power regulator is in low voltage mode; If the Under-drive mode was enabled, it is automatically disabled after exiting Stop mode. When the voltage regulator operates in Under-drive mode, an additional
startup delay is induced when waking up from Stop mode.; In Stop mode, all I/O pins keep the same state as in Run mode.; When exiting Stop mode by issuing an interrupt or a wake-up event, the HSI RC oscillator is selected as system clock.; When the voltage regulator operates in low power mode, an additional startup delay is incurred when waking up from Stop mode. By keeping the internal regulator ON during Stop mode, the consumption is higher although the startup time is reduced.

Parameters

Regulator	specifies the regulator state in STOP mode. This parameter can be one of the following values: PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode and Flash memory in power-down when the device is in Stop under-drive mode PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode and Flash memory in power-down when the device is in Stop under-drive mode
STOPEntry	specifies if STOP mode in entered with WFI or WFE instruction. This parameter can be one of the following values: PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction

Return values

None

Definition at line 536 of file stm32f4xx_hal_pwr_ex.c.

References __HAL_PWR_CLEAR_ODRUDR_FLAG, __HAL_PWR_UNDERDRIVE_ENABLE, __HAL_RCC_PWR_CLK_ENABLE, assert_param, HAL_OK, IS_PWR_REGULATOR_UNDERDRIVE, IS_PWR_STOP_ENTRY, and PWR_SLEEPENTRY_WFI.

Functions

Detailed Description

Function Documentation

◆ HAL_PWREx_EnableFlashPowerDown()

◆ HAL_PWREx_DisableFlashPowerDown()

◆ HAL_PWREx_EnableBkUpReg()

◆ HAL_PWREx_DisableBkUpReg()

◆ HAL_PWREx_GetVoltageRange()

◆ HAL_PWREx_ControlVoltageScaling()

◆ HAL_PWREx_EnableOverDrive()

◆ HAL_PWREx_DisableOverDrive()

◆ HAL_PWREx_EnterUnderDriveSTOPMode()