STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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PLLI2S Clock structure definition. More...
#include <stm32f4xx_hal_rcc_ex.h>
Data Fields | |
uint32_t | PLLI2SM |
uint32_t | PLLI2SN |
uint32_t | PLLI2SP |
uint32_t | PLLI2SQ |
uint32_t | PLLI2SR |
PLLI2S Clock structure definition.
Definition at line 79 of file stm32f4xx_hal_rcc_ex.h.
uint32_t RCC_PLLI2SInitTypeDef::PLLI2SM |
Specifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63
Definition at line 81 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_RCCEx_GetPeriphCLKConfig(), and HAL_RCCEx_PeriphCLKConfig().
uint32_t RCC_PLLI2SInitTypeDef::PLLI2SN |
Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432
Definition at line 84 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_RCCEx_GetPeriphCLKConfig(), and HAL_RCCEx_PeriphCLKConfig().
uint32_t RCC_PLLI2SInitTypeDef::PLLI2SP |
Specifies division factor for SPDIFRX Clock. This parameter must be a value of RCC PLLI2SP Clock Divider
Definition at line 87 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_RCCEx_GetPeriphCLKConfig(), and HAL_RCCEx_PeriphCLKConfig().
uint32_t RCC_PLLI2SInitTypeDef::PLLI2SQ |
Specifies the division factor for SAI clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLI2S is selected as Clock Source SAI
Definition at line 90 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_RCCEx_GetPeriphCLKConfig(), and HAL_RCCEx_PeriphCLKConfig().
uint32_t RCC_PLLI2SInitTypeDef::PLLI2SR |
Specifies the division factor for I2S clock. This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLI2S is selected as Clock Source I2S
Definition at line 94 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_RCCEx_GetPeriphCLKConfig(), and HAL_RCCEx_PeriphCLKConfig().