RCC_PLLInitTypeDef Struct Reference

RCC PLL configuration structure definition. More...

#include <stm32f4xx_hal_rcc_ex.h>

Collaboration diagram for RCC_PLLInitTypeDef:

Data Fields
uint32_t	PLLState
uint32_t	PLLSource
uint32_t	PLLM
uint32_t	PLLN
uint32_t	PLLP
uint32_t	PLLQ
uint32_t	PLLR

Detailed Description

RCC PLL configuration structure definition.

Definition at line 45 of file stm32f4xx_hal_rcc_ex.h.

Field Documentation

PLLState

uint32_t RCC_PLLInitTypeDef::PLLState

The new state of the PLL. This parameter can be a value of PLL Config

Definition at line 47 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_InitTick(), HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLSource

uint32_t RCC_PLLInitTypeDef::PLLSource

RCC_PLLSource: PLL entry clock source. This parameter must be a value of PLL Clock Source

Definition at line 50 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLM

uint32_t RCC_PLLInitTypeDef::PLLM

PLLM: Division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 0 and Max_Data = 63

Definition at line 53 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLN

uint32_t RCC_PLLInitTypeDef::PLLN

PLLN: Multiplication factor for PLL VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432 except for STM32F411xE devices where the Min_Data = 192

Definition at line 56 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLP

uint32_t RCC_PLLInitTypeDef::PLLP

PLLP: Division factor for main system clock (SYSCLK). This parameter must be a value of PLLP Clock Divider

Definition at line 60 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLQ

uint32_t RCC_PLLInitTypeDef::PLLQ

PLLQ: Division factor for OTG FS, SDIO and RNG clocks. This parameter must be a number between Min_Data = 2 and Max_Data = 15

Definition at line 63 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

PLLR

uint32_t RCC_PLLInitTypeDef::PLLR

PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks. This parameter is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx and STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F413xx/STM32F423xx devices. This parameter must be a number between Min_Data = 2 and Max_Data = 7

Definition at line 68 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().

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The documentation for this struct was generated from the following file:

• stm32f4xx_hal_rcc_ex.h