AHB1 Peripheral Clock Enable Disable

Enables or disables the AHB1 peripheral clock. More...

Collaboration diagram for AHB1 Peripheral Clock Enable Disable:

Macros
#define	__HAL_RCC_BKPSRAM_CLK_ENABLE()
#define	__HAL_RCC_CCMDATARAMEN_CLK_ENABLE()
#define	__HAL_RCC_CRC_CLK_ENABLE()
#define	__HAL_RCC_GPIOD_CLK_ENABLE()
#define	__HAL_RCC_GPIOE_CLK_ENABLE()
#define	__HAL_RCC_GPIOF_CLK_ENABLE()
#define	__HAL_RCC_GPIOG_CLK_ENABLE()
#define	__HAL_RCC_USB_OTG_HS_CLK_ENABLE()
#define	__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE()
#define	__HAL_RCC_GPIOD_CLK_DISABLE()
#define	__HAL_RCC_GPIOE_CLK_DISABLE()
#define	__HAL_RCC_GPIOF_CLK_DISABLE()
#define	__HAL_RCC_GPIOG_CLK_DISABLE()
#define	__HAL_RCC_USB_OTG_HS_CLK_DISABLE()
#define	__HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE()
#define	__HAL_RCC_BKPSRAM_CLK_DISABLE()
#define	__HAL_RCC_CCMDATARAMEN_CLK_DISABLE()
#define	__HAL_RCC_CRC_CLK_DISABLE()

Detailed Description

Enables or disables the AHB1 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

__HAL_RCC_BKPSRAM_CLK_ENABLE

#define __HAL_RCC_BKPSRAM_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                            do { \
                                            __IO uint32_t tmpreg = 0x00U; \
                                            SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
                                            /* Delay after an RCC peripheral clock enabling */ \
                                            tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
                                            UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 3961 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_CCMDATARAMEN_CLK_ENABLE

#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                                 do { \
                                                 __IO uint32_t tmpreg = 0x00U; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
                                                 UNUSED(tmpreg); \
                                               } while(0U)

Definition at line 3968 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_CRC_CLK_ENABLE

#define __HAL_RCC_CRC_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                            do { \
                                            __IO uint32_t tmpreg = 0x00U; \
                                            SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
                                            /* Delay after an RCC peripheral clock enabling */ \
                                            tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
                                            UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 3975 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOD_CLK_ENABLE

#define __HAL_RCC_GPIOD_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                            do { \
                                            __IO uint32_t tmpreg = 0x00U; \
                                            SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
                                            /* Delay after an RCC peripheral clock enabling */ \
                                            tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
                                            UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 3982 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOE_CLK_ENABLE

#define __HAL_RCC_GPIOE_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                            do { \
                                            __IO uint32_t tmpreg = 0x00U; \
                                            SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
                                            /* Delay after an RCC peripheral clock enabling */ \
                                            tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
                                            UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 3989 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOF_CLK_ENABLE

#define __HAL_RCC_GPIOF_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                           do { \
                                           __IO uint32_t tmpreg = 0x00U; \
                                           SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
                                           /* Delay after an RCC peripheral clock enabling */ \
                                           tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
                                           UNUSED(tmpreg); \
                                         } while(0U)

Definition at line 3996 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOG_CLK_ENABLE

#define __HAL_RCC_GPIOG_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                           do { \
                                           __IO uint32_t tmpreg = 0x00U; \
                                           SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
                                           /* Delay after an RCC peripheral clock enabling */ \
                                           tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
                                           UNUSED(tmpreg); \
                                         } while(0U)

Definition at line 4003 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_USB_OTG_HS_CLK_ENABLE

#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                                 do { \
                                                 __IO uint32_t tmpreg = 0x00U; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
                                                 UNUSED(tmpreg); \
                                               } while(0U)

Definition at line 4010 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE

#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

                                                      do { \
                                                      __IO uint32_t tmpreg = 0x00U; \
                                                      SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
                                                      /* Delay after an RCC peripheral clock enabling */ \
                                                      tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
                                                      UNUSED(tmpreg); \
                                                    } while(0U)

Definition at line 4017 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOD_CLK_DISABLE

#define __HAL_RCC_GPIOD_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))

Definition at line 4024 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOE_CLK_DISABLE

#define __HAL_RCC_GPIOE_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))

Definition at line 4025 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOF_CLK_DISABLE

#define __HAL_RCC_GPIOF_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))

Definition at line 4026 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_GPIOG_CLK_DISABLE

#define __HAL_RCC_GPIOG_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))

Definition at line 4027 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_USB_OTG_HS_CLK_DISABLE

#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))

Definition at line 4028 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE

#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))

Definition at line 4029 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_BKPSRAM_CLK_DISABLE

#define __HAL_RCC_BKPSRAM_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))

Definition at line 4030 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_CCMDATARAMEN_CLK_DISABLE

#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))

Definition at line 4031 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_CRC_CLK_DISABLE

#define __HAL_RCC_CRC_CLK_DISABLE

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

(RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))

Definition at line 4032 of file stm32f4xx_hal_rcc_ex.h.