STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros
AHB1 Peripheral Clock Enable Disable Status
STM32F4xx_HAL_Driver » RCCEx » RCCEx Exported Macros

Get the enable or disable status of the AHB1 peripheral clock. More...

Collaboration diagram for AHB1 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOF_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOG_IS_CLK_ENABLED()
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED()
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED()
 
#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED()
 
#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED()
 
#define __HAL_RCC_CRC_IS_CLK_ENABLED()
 
#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOF_IS_CLK_DISABLED()
 
#define __HAL_RCC_GPIOG_IS_CLK_DISABLED()
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED()
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED()
 
#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED()
 
#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED()
 
#define __HAL_RCC_CRC_IS_CLK_DISABLED()
 

Detailed Description

Get the enable or disable status of the AHB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_GPIOD_IS_CLK_ENABLED

#define __HAL_RCC_GPIOD_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)

Definition at line 4044 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_ENABLED

#define __HAL_RCC_GPIOE_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)

Definition at line 4045 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_ENABLED

#define __HAL_RCC_GPIOF_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)

Definition at line 4046 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_ENABLED

#define __HAL_RCC_GPIOG_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)

Definition at line 4047 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)

Definition at line 4048 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)

Definition at line 4049 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_ENABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)

Definition at line 4050 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED

#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN))!= RESET)

Definition at line 4051 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CRC_IS_CLK_ENABLED

#define __HAL_RCC_CRC_IS_CLK_ENABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)

Definition at line 4052 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOD_IS_CLK_DISABLED

#define __HAL_RCC_GPIOD_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)

Definition at line 4054 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_DISABLED

#define __HAL_RCC_GPIOE_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)

Definition at line 4055 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_DISABLED

#define __HAL_RCC_GPIOF_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)

Definition at line 4056 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_DISABLED

#define __HAL_RCC_GPIOG_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)

Definition at line 4057 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)

Definition at line 4058 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET)

Definition at line 4059 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_DISABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)

Definition at line 4060 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED

#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)

Definition at line 4061 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CRC_IS_CLK_DISABLED

#define __HAL_RCC_CRC_IS_CLK_DISABLED ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)

Definition at line 4062 of file stm32f4xx_hal_rcc_ex.h.