AHB3 Peripheral Clock Enable Disable Status

Get the enable or disable status of the AHB3 peripheral clock. More...

Collaboration diagram for AHB3 Peripheral Clock Enable Disable Status:

Macros
#define	__HAL_RCC_FMC_IS_CLK_ENABLED()
#define	__HAL_RCC_QSPI_IS_CLK_ENABLED()
#define	__HAL_RCC_FMC_IS_CLK_DISABLED()
#define	__HAL_RCC_QSPI_IS_CLK_DISABLED()

Detailed Description

Get the enable or disable status of the AHB3 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

__HAL_RCC_FMC_IS_CLK_ENABLED

#define __HAL_RCC_FMC_IS_CLK_ENABLED

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)

Definition at line 4154 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_QSPI_IS_CLK_ENABLED

#define __HAL_RCC_QSPI_IS_CLK_ENABLED

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)

Definition at line 4155 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_FMC_IS_CLK_DISABLED

#define __HAL_RCC_FMC_IS_CLK_DISABLED

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)

Definition at line 4157 of file stm32f4xx_hal_rcc_ex.h.

__HAL_RCC_QSPI_IS_CLK_DISABLED

#define __HAL_RCC_QSPI_IS_CLK_DISABLED

(

)

#include <stm32f4xx_hal_rcc_ex.h>

Value:

((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)

Definition at line 4158 of file stm32f4xx_hal_rcc_ex.h.