STM32F4xx HAL Documentation
Hardware Abstraction Layer for STM32F4 familiy
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Macros
APB1 Peripheral Clock Enable Disable
STM32F4xx_HAL_Driver » RCCEx » RCCEx Exported Macros

Enable or disable the Low Speed APB (APB1) peripheral clock. More...

Collaboration diagram for APB1 Peripheral Clock Enable Disable:

Macros

#define __HAL_RCC_TIM6_CLK_ENABLE()
 
#define __HAL_RCC_TIM7_CLK_ENABLE()
 
#define __HAL_RCC_TIM12_CLK_ENABLE()
 
#define __HAL_RCC_TIM13_CLK_ENABLE()
 
#define __HAL_RCC_TIM14_CLK_ENABLE()
 
#define __HAL_RCC_SPDIFRX_CLK_ENABLE()
 
#define __HAL_RCC_USART3_CLK_ENABLE()
 
#define __HAL_RCC_UART4_CLK_ENABLE()
 
#define __HAL_RCC_UART5_CLK_ENABLE()
 
#define __HAL_RCC_FMPI2C1_CLK_ENABLE()
 
#define __HAL_RCC_CAN1_CLK_ENABLE()
 
#define __HAL_RCC_CAN2_CLK_ENABLE()
 
#define __HAL_RCC_CEC_CLK_ENABLE()
 
#define __HAL_RCC_DAC_CLK_ENABLE()
 
#define __HAL_RCC_TIM2_CLK_ENABLE()
 
#define __HAL_RCC_TIM3_CLK_ENABLE()
 
#define __HAL_RCC_TIM4_CLK_ENABLE()
 
#define __HAL_RCC_SPI3_CLK_ENABLE()
 
#define __HAL_RCC_I2C3_CLK_ENABLE()
 
#define __HAL_RCC_TIM2_CLK_DISABLE()
 
#define __HAL_RCC_TIM3_CLK_DISABLE()
 
#define __HAL_RCC_TIM4_CLK_DISABLE()
 
#define __HAL_RCC_SPI3_CLK_DISABLE()
 
#define __HAL_RCC_I2C3_CLK_DISABLE()
 
#define __HAL_RCC_TIM6_CLK_DISABLE()
 
#define __HAL_RCC_TIM7_CLK_DISABLE()
 
#define __HAL_RCC_TIM12_CLK_DISABLE()
 
#define __HAL_RCC_TIM13_CLK_DISABLE()
 
#define __HAL_RCC_TIM14_CLK_DISABLE()
 
#define __HAL_RCC_SPDIFRX_CLK_DISABLE()
 
#define __HAL_RCC_USART3_CLK_DISABLE()
 
#define __HAL_RCC_UART4_CLK_DISABLE()
 
#define __HAL_RCC_UART5_CLK_DISABLE()
 
#define __HAL_RCC_FMPI2C1_CLK_DISABLE()
 
#define __HAL_RCC_CAN1_CLK_DISABLE()
 
#define __HAL_RCC_CAN2_CLK_DISABLE()
 
#define __HAL_RCC_CEC_CLK_DISABLE()
 
#define __HAL_RCC_DAC_CLK_DISABLE()
 

Detailed Description

Enable or disable the Low Speed APB (APB1) peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_TIM6_CLK_ENABLE

#define __HAL_RCC_TIM6_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4170 of file stm32f4xx_hal_rcc_ex.h.

Referenced by HAL_InitTick().

◆ __HAL_RCC_TIM7_CLK_ENABLE

#define __HAL_RCC_TIM7_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4177 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_CLK_ENABLE

#define __HAL_RCC_TIM12_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4184 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_CLK_ENABLE

#define __HAL_RCC_TIM13_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4191 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_CLK_ENABLE

#define __HAL_RCC_TIM14_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4198 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPDIFRX_CLK_ENABLE

#define __HAL_RCC_SPDIFRX_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPDIFRXEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPDIFRXEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4205 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_CLK_ENABLE

#define __HAL_RCC_USART3_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4212 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_CLK_ENABLE

#define __HAL_RCC_UART4_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4219 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_CLK_ENABLE

#define __HAL_RCC_UART5_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4226 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMPI2C1_CLK_ENABLE

#define __HAL_RCC_FMPI2C1_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4233 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_CLK_ENABLE

#define __HAL_RCC_CAN1_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4240 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN2_CLK_ENABLE

#define __HAL_RCC_CAN2_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4247 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CEC_CLK_ENABLE

#define __HAL_RCC_CEC_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4254 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_CLK_ENABLE

#define __HAL_RCC_DAC_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4261 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_CLK_ENABLE

#define __HAL_RCC_TIM2_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4268 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_CLK_ENABLE

#define __HAL_RCC_TIM3_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4275 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_CLK_ENABLE

#define __HAL_RCC_TIM4_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4282 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_CLK_ENABLE

#define __HAL_RCC_SPI3_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4289 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_CLK_ENABLE

#define __HAL_RCC_I2C3_CLK_ENABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
UNUSED(tmpreg); \
} while(0U)

Definition at line 4296 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_CLK_DISABLE

#define __HAL_RCC_TIM2_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))

Definition at line 4303 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_CLK_DISABLE

#define __HAL_RCC_TIM3_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))

Definition at line 4304 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_CLK_DISABLE

#define __HAL_RCC_TIM4_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))

Definition at line 4305 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_CLK_DISABLE

#define __HAL_RCC_SPI3_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))

Definition at line 4306 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_CLK_DISABLE

#define __HAL_RCC_I2C3_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))

Definition at line 4307 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM6_CLK_DISABLE

#define __HAL_RCC_TIM6_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))

Definition at line 4308 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM7_CLK_DISABLE

#define __HAL_RCC_TIM7_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM7EN))

Definition at line 4309 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_CLK_DISABLE

#define __HAL_RCC_TIM12_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))

Definition at line 4310 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_CLK_DISABLE

#define __HAL_RCC_TIM13_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))

Definition at line 4311 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_CLK_DISABLE

#define __HAL_RCC_TIM14_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_TIM14EN))

Definition at line 4312 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPDIFRX_CLK_DISABLE

#define __HAL_RCC_SPDIFRX_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_SPDIFRXEN))

Definition at line 4313 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_CLK_DISABLE

#define __HAL_RCC_USART3_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))

Definition at line 4314 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_CLK_DISABLE

#define __HAL_RCC_UART4_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))

Definition at line 4315 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_CLK_DISABLE

#define __HAL_RCC_UART5_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))

Definition at line 4316 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMPI2C1_CLK_DISABLE

#define __HAL_RCC_FMPI2C1_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_FMPI2C1EN))

Definition at line 4317 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_CLK_DISABLE

#define __HAL_RCC_CAN1_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))

Definition at line 4318 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN2_CLK_DISABLE

#define __HAL_RCC_CAN2_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_CAN2EN))

Definition at line 4319 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_CEC_CLK_DISABLE

#define __HAL_RCC_CEC_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_CECEN))

Definition at line 4320 of file stm32f4xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_CLK_DISABLE

#define __HAL_RCC_DAC_CLK_DISABLE ( )

#include <stm32f4xx_hal_rcc_ex.h>

Value:
(RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))

Definition at line 4321 of file stm32f4xx_hal_rcc_ex.h.