Header file of ETH HAL module. More...

#include "stm32f4xx_hal_def.h"

Include dependency graph for stm32f4xx_hal_eth.h:

Data Structures
struct	ETH_DMADescTypeDef
	ETH DMA Descriptor structure definition. More...

struct	__ETH_BufferTypeDef
	ETH Buffers List structure definition. More...

struct	ETH_TxDescListTypeDef
	DMA Transmit Descriptors Wrapper structure definition. More...

struct	ETH_TxPacketConfigTypeDef
	Transmit Packet Configuration structure definition. More...

struct	ETH_TimeStampTypeDef
	ETH Timestamp structure definition. More...

struct	ETH_RxDescListTypeDef
	DMA Receive Descriptors Wrapper structure definition. More...

struct	ETH_MACConfigTypeDef
	ETH MAC Configuration Structure definition. More...

struct	ETH_DMAConfigTypeDef
	ETH DMA Configuration Structure definition. More...

struct	ETH_InitTypeDef
	ETH Init Structure definition. More...

struct	ETH_HandleTypeDef
	ETH Handle Structure definition. More...

struct	ETH_MACFilterConfigTypeDef
	ETH MAC filter structure definition. More...

struct	ETH_PowerDownConfigTypeDef
	ETH Power Down structure definition. More...

Macros
#define	ETH_TX_DESC_CNT 4U

#define	ETH_RX_DESC_CNT 4U

#define	ETH_DMATXDESC_OWN 0x80000000U
	Bit definition of TDES0 register: DMA Tx descriptor status register.

#define	ETH_DMATXDESC_IC 0x40000000U

#define	ETH_DMATXDESC_LS 0x20000000U

#define	ETH_DMATXDESC_FS 0x10000000U

#define	ETH_DMATXDESC_DC 0x08000000U

#define	ETH_DMATXDESC_DP 0x04000000U

#define	ETH_DMATXDESC_TTSE 0x02000000U

#define	ETH_DMATXDESC_CIC 0x00C00000U

#define	ETH_DMATXDESC_CIC_BYPASS 0x00000000U

#define	ETH_DMATXDESC_CIC_IPV4HEADER 0x00400000U

#define	ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT 0x00800000U

#define	ETH_DMATXDESC_CIC_TCPUDPICMP_FULL 0x00C00000U

#define	ETH_DMATXDESC_TER 0x00200000U

#define	ETH_DMATXDESC_TCH 0x00100000U

#define	ETH_DMATXDESC_TTSS 0x00020000U

#define	ETH_DMATXDESC_IHE 0x00010000U

#define	ETH_DMATXDESC_ES 0x00008000U

#define	ETH_DMATXDESC_JT 0x00004000U

#define	ETH_DMATXDESC_FF 0x00002000U

#define	ETH_DMATXDESC_PCE 0x00001000U

#define	ETH_DMATXDESC_LCA 0x00000800U

#define	ETH_DMATXDESC_NC 0x00000400U

#define	ETH_DMATXDESC_LCO 0x00000200U

#define	ETH_DMATXDESC_EC 0x00000100U

#define	ETH_DMATXDESC_VF 0x00000080U

#define	ETH_DMATXDESC_CC 0x00000078U

#define	ETH_DMATXDESC_ED 0x00000004U

#define	ETH_DMATXDESC_UF 0x00000002U

#define	ETH_DMATXDESC_DB 0x00000001U

#define	ETH_DMATXDESC_TBS2 0x1FFF0000U
	Bit definition of TDES1 register.

#define	ETH_DMATXDESC_TBS1 0x00001FFFU

#define	ETH_DMATXDESC_B1AP 0xFFFFFFFFU
	Bit definition of TDES2 register.

#define	ETH_DMATXDESC_B2AP 0xFFFFFFFFU
	Bit definition of TDES3 register.

#define	ETH_DMAPTPTXDESC_TTSL 0xFFFFFFFFU /* Transmit Time Stamp Low */

#define	ETH_DMAPTPTXDESC_TTSH 0xFFFFFFFFU /* Transmit Time Stamp High */

#define	ETH_DMARXDESC_OWN 0x80000000U
	Bit definition of RDES0 register: DMA Rx descriptor status register.

#define	ETH_DMARXDESC_AFM 0x40000000U

#define	ETH_DMARXDESC_FL 0x3FFF0000U

#define	ETH_DMARXDESC_ES 0x00008000U

#define	ETH_DMARXDESC_DE 0x00004000U

#define	ETH_DMARXDESC_SAF 0x00002000U

#define	ETH_DMARXDESC_LE 0x00001000U

#define	ETH_DMARXDESC_OE 0x00000800U

#define	ETH_DMARXDESC_VLAN 0x00000400U

#define	ETH_DMARXDESC_FS 0x00000200U

#define	ETH_DMARXDESC_LS 0x00000100U

#define	ETH_DMARXDESC_IPV4HCE 0x00000080U

#define	ETH_DMARXDESC_LC 0x00000040U

#define	ETH_DMARXDESC_FT 0x00000020U

#define	ETH_DMARXDESC_RWT 0x00000010U

#define	ETH_DMARXDESC_RE 0x00000008U

#define	ETH_DMARXDESC_DBE 0x00000004U

#define	ETH_DMARXDESC_CE 0x00000002U

#define	ETH_DMARXDESC_MAMPCE 0x00000001U

#define	ETH_DMARXDESC_DIC 0x80000000U
	Bit definition of RDES1 register.

#define	ETH_DMARXDESC_RBS2 0x1FFF0000U

#define	ETH_DMARXDESC_RER 0x00008000U

#define	ETH_DMARXDESC_RCH 0x00004000U

#define	ETH_DMARXDESC_RBS1 0x00001FFFU

#define	ETH_DMARXDESC_B1AP 0xFFFFFFFFU
	Bit definition of RDES2 register.

#define	ETH_DMARXDESC_B2AP 0xFFFFFFFFU
	Bit definition of RDES3 register.

#define	ETH_DMAPTPRXDESC_PTPV 0x00002000U /* PTP Version */

#define	ETH_DMAPTPRXDESC_PTPFT 0x00001000U /* PTP Frame Type */

#define	ETH_DMAPTPRXDESC_PTPMT 0x00000F00U /* PTP Message Type */

#define	ETH_DMAPTPRXDESC_PTPMT_SYNC

#define	ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP

#define	ETH_DMAPTPRXDESC_PTPMT_DELAYREQ

#define	ETH_DMAPTPRXDESC_PTPMT_DELAYRESP

#define	ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE

#define	ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG

#define	ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL

#define	ETH_DMAPTPRXDESC_IPV6PR 0x00000080U /* IPv6 Packet Received */

#define	ETH_DMAPTPRXDESC_IPV4PR 0x00000040U /* IPv4 Packet Received */

#define	ETH_DMAPTPRXDESC_IPCB 0x00000020U /* IP Checksum Bypassed */

#define	ETH_DMAPTPRXDESC_IPPE 0x00000010U /* IP Payload Error */

#define	ETH_DMAPTPRXDESC_IPHE 0x00000008U /* IP Header Error */

#define	ETH_DMAPTPRXDESC_IPPT 0x00000007U /* IP Payload Type */

#define	ETH_DMAPTPRXDESC_IPPT_UDP

#define	ETH_DMAPTPRXDESC_IPPT_TCP

#define	ETH_DMAPTPRXDESC_IPPT_ICMP

#define	ETH_DMAPTPRXDESC_RTSL 0xFFFFFFFFU /* Receive Time Stamp Low */

#define	ETH_DMAPTPRXDESC_RTSH 0xFFFFFFFFU /* Receive Time Stamp High */

#define	ETH_MAX_PACKET_SIZE 1528U

#define	ETH_HEADER 14U

#define	ETH_CRC 4U

#define	ETH_VLAN_TAG 4U

#define	ETH_MIN_PAYLOAD 46U

#define	ETH_MAX_PAYLOAD 1500U

#define	ETH_JUMBO_FRAME_PAYLOAD 9000U

#define	HAL_ETH_ERROR_NONE 0x00000000U

#define	HAL_ETH_ERROR_PARAM 0x00000001U

#define	HAL_ETH_ERROR_BUSY 0x00000002U

#define	HAL_ETH_ERROR_TIMEOUT 0x00000004U

#define	HAL_ETH_ERROR_DMA 0x00000008U

#define	HAL_ETH_ERROR_MAC 0x00000010U

#define	ETH_TX_PACKETS_FEATURES_CSUM 0x00000001U

#define	ETH_TX_PACKETS_FEATURES_SAIC 0x00000002U

#define	ETH_TX_PACKETS_FEATURES_VLANTAG 0x00000004U

#define	ETH_TX_PACKETS_FEATURES_INNERVLANTAG 0x00000008U

#define	ETH_TX_PACKETS_FEATURES_TSO 0x00000010U

#define	ETH_TX_PACKETS_FEATURES_CRCPAD 0x00000020U

#define	ETH_CRC_PAD_DISABLE (uint32_t)(ETH_DMATXDESC_DP \| ETH_DMATXDESC_DC)

#define	ETH_CRC_PAD_INSERT 0x00000000U

#define	ETH_CRC_INSERT ETH_DMATXDESC_DP

#define	ETH_CHECKSUM_DISABLE ETH_DMATXDESC_CIC_BYPASS

#define	ETH_CHECKSUM_IPHDR_INSERT ETH_DMATXDESC_CIC_IPV4HEADER

#define	ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT

#define	ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC ETH_DMATXDESC_CIC_TCPUDPICMP_FULL

#define	ETH_VLAN_FILTER_PASS ETH_DMARXDESC_VLAN

#define	ETH_DEST_ADDRESS_FAIL ETH_DMARXDESC_AFM

#define	ETH_SOURCE_ADDRESS_FAIL ETH_DMARXDESC_SAF

#define	ETH_DRIBBLE_BIT_ERROR ETH_DMARXDESC_DBE

#define	ETH_RECEIVE_ERROR ETH_DMARXDESC_RE

#define	ETH_RECEIVE_OVERFLOW ETH_DMARXDESC_OE

#define	ETH_WATCHDOG_TIMEOUT ETH_DMARXDESC_RWT

#define	ETH_GIANT_PACKET ETH_DMARXDESC_IPV4HC

#define	ETH_CRC_ERROR ETH_DMARXDESC_CE

#define	ETH_DMAARBITRATION_RX ETH_DMABMR_DA

#define	ETH_DMAARBITRATION_RX1_TX1 0x00000000U

#define	ETH_DMAARBITRATION_RX2_TX1 ETH_DMABMR_RTPR_2_1

#define	ETH_DMAARBITRATION_RX3_TX1 ETH_DMABMR_RTPR_3_1

#define	ETH_DMAARBITRATION_RX4_TX1 ETH_DMABMR_RTPR_4_1

#define	ETH_DMAARBITRATION_TX (ETH_DMAMR_TXPR \| ETH_DMAMR_DA)

#define	ETH_DMAARBITRATION_TX1_RX1 0x00000000U

#define	ETH_DMAARBITRATION_TX2_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_2_1)

#define	ETH_DMAARBITRATION_TX3_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_3_1)

#define	ETH_DMAARBITRATION_TX4_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_4_1)

#define	ETH_DMAARBITRATION_TX5_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_5_1)

#define	ETH_DMAARBITRATION_TX6_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_6_1)

#define	ETH_DMAARBITRATION_TX7_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_7_1)

#define	ETH_DMAARBITRATION_TX8_RX1 (ETH_DMAMR_TXPR \| ETH_DMAMR_PR_8_1)

#define	ETH_BURSTLENGTH_FIXED ETH_DMABMR_FB

#define	ETH_BURSTLENGTH_MIXED ETH_DMABMR_MB

#define	ETH_BURSTLENGTH_UNSPECIFIED 0x00000000U

#define	ETH_TXDMABURSTLENGTH_1BEAT 0x00000100U

#define	ETH_TXDMABURSTLENGTH_2BEAT 0x00000200U

#define	ETH_TXDMABURSTLENGTH_4BEAT 0x00000400U

#define	ETH_TXDMABURSTLENGTH_8BEAT 0x00000800U

#define	ETH_TXDMABURSTLENGTH_16BEAT 0x00001000U

#define	ETH_TXDMABURSTLENGTH_32BEAT 0x00002000U

#define	ETH_TXDMABURSTLENGTH_4XPBL_4BEAT 0x01000100U

#define	ETH_TXDMABURSTLENGTH_4XPBL_8BEAT 0x01000200U

#define	ETH_TXDMABURSTLENGTH_4XPBL_16BEAT 0x01000400U

#define	ETH_TXDMABURSTLENGTH_4XPBL_32BEAT 0x01000800U

#define	ETH_TXDMABURSTLENGTH_4XPBL_64BEAT 0x01001000U

#define	ETH_TXDMABURSTLENGTH_4XPBL_128BEAT 0x01002000U

#define	ETH_RXDMABURSTLENGTH_1BEAT 0x00020000U

#define	ETH_RXDMABURSTLENGTH_2BEAT 0x00040000U

#define	ETH_RXDMABURSTLENGTH_4BEAT 0x00080000U

#define	ETH_RXDMABURSTLENGTH_8BEAT 0x00100000U

#define	ETH_RXDMABURSTLENGTH_16BEAT 0x00200000U

#define	ETH_RXDMABURSTLENGTH_32BEAT 0x00400000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_4BEAT 0x01020000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_8BEAT 0x01040000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_16BEAT 0x01080000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_32BEAT 0x01100000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_64BEAT 0x01200000U

#define	ETH_RXDMABURSTLENGTH_4XPBL_128BEAT 0x01400000U

#define	ETH_DMA_NORMAL_IT ETH_DMAIER_NISE

#define	ETH_DMA_ABNORMAL_IT ETH_DMAIER_AISE

#define	ETH_DMA_FATAL_BUS_ERROR_IT ETH_DMAIER_FBEIE

#define	ETH_DMA_EARLY_RX_IT ETH_DMAIER_ERIE

#define	ETH_DMA_EARLY_TX_IT ETH_DMAIER_ETIE

#define	ETH_DMA_RX_WATCHDOG_TIMEOUT_IT ETH_DMAIER_RWTIE

#define	ETH_DMA_RX_PROCESS_STOPPED_IT ETH_DMAIER_RPSIE

#define	ETH_DMA_RX_BUFFER_UNAVAILABLE_IT ETH_DMAIER_RBUIE

#define	ETH_DMA_RX_IT ETH_DMAIER_RIE

#define	ETH_DMA_TX_BUFFER_UNAVAILABLE_IT ETH_DMAIER_TBUIE

#define	ETH_DMA_TX_PROCESS_STOPPED_IT ETH_DMAIER_TPSIE

#define	ETH_DMA_TX_IT ETH_DMAIER_TIE

#define	ETH_DMA_NO_ERROR_FLAG 0x00000000U

#define	ETH_DMA_TX_DATA_TRANS_ERROR_FLAG ETH_DMASR_EBS_DataTransfTx

#define	ETH_DMA_RX_DATA_TRANS_ERROR_FLAG 0x00000000U

#define	ETH_DMA_READ_TRANS_ERROR_FLAG ETH_DMASR_EBS_ReadTransf

#define	ETH_DMA_WRITE_TRANS_ERROR_FLAG 0x00000000U

#define	ETH_DMA_DESC_ACCESS_ERROR_FLAG ETH_DMASR_EBS_DescAccess

#define	ETH_DMA_DATA_BUFF_ACCESS_ERROR_FLAG 0x00000000U

#define	ETH_DMA_FATAL_BUS_ERROR_FLAG ETH_DMASR_FBES

#define	ETH_DMA_EARLY_TX_IT_FLAG ETH_DMASR_ETS

#define	ETH_DMA_RX_WATCHDOG_TIMEOUT_FLAG ETH_DMASR_RWTS

#define	ETH_DMA_RX_PROCESS_STOPPED_FLAG ETH_DMASR_RPSS

#define	ETH_DMA_RX_BUFFER_UNAVAILABLE_FLAG ETH_DMASR_RBUS

#define	ETH_DMA_TX_PROCESS_STOPPED_FLAG ETH_DMASR_TPS

#define	ETH_TRANSMITSTOREFORWARD ETH_DMAOMR_TSF

#define	ETH_TRANSMITTHRESHOLD_16 ETH_DMAOMR_TTC_16Bytes

#define	ETH_TRANSMITTHRESHOLD_24 ETH_DMAOMR_TTC_24Bytes

#define	ETH_TRANSMITTHRESHOLD_32 ETH_DMAOMR_TTC_32Bytes

#define	ETH_TRANSMITTHRESHOLD_40 ETH_DMAOMR_TTC_40Bytes

#define	ETH_TRANSMITTHRESHOLD_64 ETH_DMAOMR_TTC_64Bytes

#define	ETH_TRANSMITTHRESHOLD_128 ETH_DMAOMR_TTC_128Bytes

#define	ETH_TRANSMITTHRESHOLD_192 ETH_DMAOMR_TTC_192Bytes

#define	ETH_TRANSMITTHRESHOLD_256 ETH_DMAOMR_TTC_256Bytes

#define	ETH_RECEIVESTOREFORWARD ETH_DMAOMR_RSF

#define	ETH_RECEIVETHRESHOLD8_64 ETH_DMAOMR_RTC_64Bytes

#define	ETH_RECEIVETHRESHOLD8_32 ETH_DMAOMR_RTC_32Bytes

#define	ETH_RECEIVETHRESHOLD8_96 ETH_DMAOMR_RTC_96Bytes

#define	ETH_RECEIVETHRESHOLD8_128 ETH_DMAOMR_RTC_128Bytes

#define	ETH_PAUSELOWTHRESHOLD_MINUS_4 ETH_MACFCR_PLT_Minus4

#define	ETH_PAUSELOWTHRESHOLD_MINUS_28 ETH_MACFCR_PLT_Minus28

#define	ETH_PAUSELOWTHRESHOLD_MINUS_144 ETH_MACFCR_PLT_Minus144

#define	ETH_PAUSELOWTHRESHOLD_MINUS_256 ETH_MACFCR_PLT_Minus256

#define	ETH_SPEED_10M 0x00000000U

#define	ETH_SPEED_100M 0x00004000U

#define	ETH_FULLDUPLEX_MODE ETH_MACCR_DM

#define	ETH_HALFDUPLEX_MODE 0x00000000U

#define	ETH_BACKOFFLIMIT_10 0x00000000U

#define	ETH_BACKOFFLIMIT_8 0x00000020U

#define	ETH_BACKOFFLIMIT_4 0x00000040U

#define	ETH_BACKOFFLIMIT_1 0x00000060U

#define	ETH_SOURCEADDRESS_DISABLE 0x00000000U

#define	ETH_SOURCEADDRESS_INSERT_ADDR0 ETH_MACCR_SARC_INSADDR0

#define	ETH_SOURCEADDRESS_INSERT_ADDR1 ETH_MACCR_SARC_INSADDR1

#define	ETH_SOURCEADDRESS_REPLACE_ADDR0 ETH_MACCR_SARC_REPADDR0

#define	ETH_SOURCEADDRESS_REPLACE_ADDR1 ETH_MACCR_SARC_REPADDR1

#define	ETH_VLANTAGCOMPARISON_12BIT 0x00010000U

#define	ETH_VLANTAGCOMPARISON_16BIT 0x00000000U

#define	ETH_MAC_ADDRESS0 0x00000000U

#define	ETH_MAC_ADDRESS1 0x00000008U

#define	ETH_MAC_ADDRESS2 0x00000010U

#define	ETH_MAC_ADDRESS3 0x00000018U

#define	ETH_MAC_PMT_IT ETH_MACSR_PMTS

#define	ETH_WAKEUP_FRAME_RECIEVED ETH_MACPMTCSR_WFR

#define	ETH_MAGIC_PACKET_RECIEVED ETH_MACPMTCSR_MPR

#define	HAL_ETH_STATE_RESET 0x00000000U

#define	HAL_ETH_STATE_READY 0x00000010U

#define	HAL_ETH_STATE_BUSY 0x00000023U

#define	HAL_ETH_STATE_STARTED 0x00000023U

#define	HAL_ETH_STATE_ERROR 0x000000E0U

#define	ETH_AUTONEGOTIATION_ENABLE 0x00000001U

#define	ETH_AUTONEGOTIATION_DISABLE 0x00000000U

#define	ETH_RXPOLLING_MODE 0x00000000U

#define	ETH_RXINTERRUPT_MODE 0x00000001U

#define	ETH_CHECKSUM_BY_HARDWARE 0x00000000U

#define	ETH_CHECKSUM_BY_SOFTWARE 0x00000001U

#define	ETH_MEDIA_INTERFACE_MII 0x00000000U

#define	ETH_MEDIA_INTERFACE_RMII (SYSCFG_PMC_MII_RMII_SEL)

#define	ETH_WATCHDOG_ENABLE 0x00000000U

#define	ETH_WATCHDOG_DISABLE 0x00800000U

#define	ETH_JABBER_ENABLE 0x00000000U

#define	ETH_JABBER_DISABLE 0x00400000U

#define	ETH_INTERFRAMEGAP_96BIT 0x00000000U

#define	ETH_INTERFRAMEGAP_88BIT 0x00020000U

#define	ETH_INTERFRAMEGAP_80BIT 0x00040000U

#define	ETH_INTERFRAMEGAP_72BIT 0x00060000U

#define	ETH_INTERFRAMEGAP_64BIT 0x00080000U

#define	ETH_INTERFRAMEGAP_56BIT 0x000A0000U

#define	ETH_INTERFRAMEGAP_48BIT 0x000C0000U

#define	ETH_INTERFRAMEGAP_40BIT 0x000E0000U

#define	ETH_CARRIERSENCE_ENABLE 0x00000000U

#define	ETH_CARRIERSENCE_DISABLE 0x00010000U

#define	ETH_RECEIVEOWN_ENABLE 0x00000000U

#define	ETH_RECEIVEOWN_DISABLE 0x00002000U

#define	ETH_LOOPBACKMODE_ENABLE 0x00001000U

#define	ETH_LOOPBACKMODE_DISABLE 0x00000000U

#define	ETH_CHECKSUMOFFLAOD_ENABLE 0x00000400U

#define	ETH_CHECKSUMOFFLAOD_DISABLE 0x00000000U

#define	ETH_RETRYTRANSMISSION_ENABLE 0x00000000U

#define	ETH_RETRYTRANSMISSION_DISABLE 0x00000200U

#define	ETH_AUTOMATICPADCRCSTRIP_ENABLE 0x00000080U

#define	ETH_AUTOMATICPADCRCSTRIP_DISABLE 0x00000000U

#define	ETH_DEFFERRALCHECK_ENABLE 0x00000010U

#define	ETH_DEFFERRALCHECK_DISABLE 0x00000000U

#define	ETH_RECEIVEALL_ENABLE 0x80000000U

#define	ETH_RECEIVEALL_DISABLE 0x00000000U

#define	ETH_SOURCEADDRFILTER_NORMAL_ENABLE 0x00000200U

#define	ETH_SOURCEADDRFILTER_INVERSE_ENABLE 0x00000300U

#define	ETH_SOURCEADDRFILTER_DISABLE 0x00000000U

#define	ETH_PASSCONTROLFRAMES_BLOCKALL 0x00000040U

#define	ETH_PASSCONTROLFRAMES_FORWARDALL 0x00000080U

#define	ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER 0x000000C0U

#define	ETH_BROADCASTFRAMESRECEPTION_ENABLE 0x00000000U

#define	ETH_BROADCASTFRAMESRECEPTION_DISABLE 0x00000020U

#define	ETH_DESTINATIONADDRFILTER_NORMAL 0x00000000U

#define	ETH_DESTINATIONADDRFILTER_INVERSE 0x00000008U

#define	ETH_PROMISCUOUS_MODE_ENABLE 0x00000001U

#define	ETH_PROMISCUOUS_MODE_DISABLE 0x00000000U

#define	ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE 0x00000404U

#define	ETH_MULTICASTFRAMESFILTER_HASHTABLE 0x00000004U

#define	ETH_MULTICASTFRAMESFILTER_PERFECT 0x00000000U

#define	ETH_MULTICASTFRAMESFILTER_NONE 0x00000010U

#define	ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE 0x00000402U

#define	ETH_UNICASTFRAMESFILTER_HASHTABLE 0x00000002U

#define	ETH_UNICASTFRAMESFILTER_PERFECT 0x00000000U

#define	ETH_ZEROQUANTAPAUSE_ENABLE 0x00000000U

#define	ETH_ZEROQUANTAPAUSE_DISABLE 0x00000080U

#define	ETH_PAUSELOWTHRESHOLD_MINUS4 0x00000000U

#define	ETH_PAUSELOWTHRESHOLD_MINUS28 0x00000010U

#define	ETH_PAUSELOWTHRESHOLD_MINUS144 0x00000020U

#define	ETH_PAUSELOWTHRESHOLD_MINUS256 0x00000030U

#define	ETH_UNICASTPAUSEFRAMEDETECT_ENABLE 0x00000008U

#define	ETH_UNICASTPAUSEFRAMEDETECT_DISABLE 0x00000000U

#define	ETH_RECEIVEFLOWCONTROL_ENABLE 0x00000004U

#define	ETH_RECEIVEFLOWCONTROL_DISABLE 0x00000000U

#define	ETH_TRANSMITFLOWCONTROL_ENABLE 0x00000002U

#define	ETH_TRANSMITFLOWCONTROL_DISABLE 0x00000000U

#define	ETH_MAC_ADDRESSFILTER_SA 0x00000000U

#define	ETH_MAC_ADDRESSFILTER_DA 0x00000008U

#define	ETH_MAC_ADDRESSMASK_BYTE6 0x20000000U

#define	ETH_MAC_ADDRESSMASK_BYTE5 0x10000000U

#define	ETH_MAC_ADDRESSMASK_BYTE4 0x08000000U

#define	ETH_MAC_ADDRESSMASK_BYTE3 0x04000000U

#define	ETH_MAC_ADDRESSMASK_BYTE2 0x02000000U

#define	ETH_MAC_ADDRESSMASK_BYTE1 0x01000000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_64BYTES 0x00000000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_128BYTES 0x00004000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_192BYTES 0x00008000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_256BYTES 0x0000C000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_40BYTES 0x00010000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_32BYTES 0x00014000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_24BYTES 0x00018000U

#define	ETH_TRANSMITTHRESHOLDCONTROL_16BYTES 0x0001C000U

#define	ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES 0x00000000U

#define	ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES 0x00000008U

#define	ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES 0x00000010U

#define	ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES 0x00000018U

#define	ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1 0x00000000U

#define	ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1 0x00004000U

#define	ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1 0x00008000U

#define	ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1 0x0000C000U

#define	ETH_DMAARBITRATION_RXPRIORTX 0x00000002U

#define	ETH_DMATXDESC_LASTSEGMENTS 0x40000000U

#define	ETH_DMATXDESC_FIRSTSEGMENT 0x20000000U

#define	ETH_DMATXDESC_CHECKSUMBYPASS 0x00000000U

#define	ETH_DMATXDESC_CHECKSUMIPV4HEADER 0x00400000U

#define	ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT 0x00800000U

#define	ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL 0x00C00000U

#define	ETH_DMARXDESC_BUFFER1 0x00000000U

#define	ETH_DMARXDESC_BUFFER2 0x00000001U

#define	ETH_PMT_FLAG_WUFFRPR 0x80000000U

#define	ETH_PMT_FLAG_WUFR 0x00000040U

#define	ETH_PMT_FLAG_MPR 0x00000020U

#define	ETH_MMC_IT_TGF 0x00200000U

#define	ETH_MMC_IT_TGFMSC 0x00008000U

#define	ETH_MMC_IT_TGFSC 0x00004000U

#define	ETH_MMC_IT_RGUF 0x10020000U

#define	ETH_MMC_IT_RFAE 0x10000040U

#define	ETH_MMC_IT_RFCE 0x10000020U

#define	ETH_MAC_FLAG_TST 0x00000200U

#define	ETH_MAC_FLAG_MMCT 0x00000040U

#define	ETH_MAC_FLAG_MMCR 0x00000020U

#define	ETH_MAC_FLAG_MMC 0x00000010U

#define	ETH_MAC_FLAG_PMT 0x00000008U

#define	ETH_DMA_FLAG_TST 0x20000000U

#define	ETH_DMA_FLAG_PMT 0x10000000U

#define	ETH_DMA_FLAG_MMC 0x08000000U

#define	ETH_DMA_FLAG_DATATRANSFERERROR 0x00800000U

#define	ETH_DMA_FLAG_READWRITEERROR 0x01000000U

#define	ETH_DMA_FLAG_ACCESSERROR 0x02000000U

#define	ETH_DMA_FLAG_NIS 0x00010000U

#define	ETH_DMA_FLAG_AIS 0x00008000U

#define	ETH_DMA_FLAG_ER 0x00004000U

#define	ETH_DMA_FLAG_FBE 0x00002000U

#define	ETH_DMA_FLAG_ET 0x00000400U

#define	ETH_DMA_FLAG_RWT 0x00000200U

#define	ETH_DMA_FLAG_RPS 0x00000100U

#define	ETH_DMA_FLAG_RBU 0x00000080U

#define	ETH_DMA_FLAG_R 0x00000040U

#define	ETH_DMA_FLAG_TU 0x00000020U

#define	ETH_DMA_FLAG_RO 0x00000010U

#define	ETH_DMA_FLAG_TJT 0x00000008U

#define	ETH_DMA_FLAG_TBU 0x00000004U

#define	ETH_DMA_FLAG_TPS 0x00000002U

#define	ETH_DMA_FLAG_T 0x00000001U

#define	ETH_MAC_IT_TST 0x00000200U

#define	ETH_MAC_IT_MMCT 0x00000040U

#define	ETH_MAC_IT_MMCR 0x00000020U

#define	ETH_MAC_IT_MMC 0x00000010U

#define	ETH_MAC_IT_PMT 0x00000008U

#define	ETH_DMA_IT_TST 0x20000000U

#define	ETH_DMA_IT_PMT 0x10000000U

#define	ETH_DMA_IT_MMC 0x08000000U

#define	ETH_DMA_IT_NIS 0x00010000U

#define	ETH_DMA_IT_AIS 0x00008000U

#define	ETH_DMA_IT_ER 0x00004000U

#define	ETH_DMA_IT_FBE 0x00002000U

#define	ETH_DMA_IT_ET 0x00000400U

#define	ETH_DMA_IT_RWT 0x00000200U

#define	ETH_DMA_IT_RPS 0x00000100U

#define	ETH_DMA_IT_RBU 0x00000080U

#define	ETH_DMA_IT_R 0x00000040U

#define	ETH_DMA_IT_TU 0x00000020U

#define	ETH_DMA_IT_RO 0x00000010U

#define	ETH_DMA_IT_TJT 0x00000008U

#define	ETH_DMA_IT_TBU 0x00000004U

#define	ETH_DMA_IT_TPS 0x00000002U

#define	ETH_DMA_IT_T 0x00000001U

#define	ETH_DMA_TRANSMITPROCESS_STOPPED 0x00000000U

#define	ETH_DMA_TRANSMITPROCESS_FETCHING 0x00100000U

#define	ETH_DMA_TRANSMITPROCESS_WAITING 0x00200000U

#define	ETH_DMA_TRANSMITPROCESS_READING 0x00300000U

#define	ETH_DMA_TRANSMITPROCESS_SUSPENDED 0x00600000U

#define	ETH_DMA_TRANSMITPROCESS_CLOSING 0x00700000U

#define	ETH_DMA_RECEIVEPROCESS_STOPPED 0x00000000U

#define	ETH_DMA_RECEIVEPROCESS_FETCHING 0x00020000U

#define	ETH_DMA_RECEIVEPROCESS_WAITING 0x00060000U

#define	ETH_DMA_RECEIVEPROCESS_SUSPENDED 0x00080000U

#define	ETH_DMA_RECEIVEPROCESS_CLOSING 0x000A0000U

#define	ETH_DMA_RECEIVEPROCESS_QUEUING 0x000E0000U

#define	ETH_DMA_OVERFLOW_RXFIFOCOUNTER 0x10000000U

#define	ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER 0x00010000U

#define	HAL_ETH_PTP_NOT_CONFIGURED 0x00000000U

#define	HAL_ETH_PTP_CONFIGURED 0x00000001U

#define	__HAL_ETH_RESET_HANDLE_STATE(__HANDLE__)
	Reset ETH handle state.

#define	__HAL_ETH_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)
	Enables the specified ETHERNET DMA interrupts.

#define	__HAL_ETH_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)
	Disables the specified ETHERNET DMA interrupts.

#define	__HAL_ETH_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
	Gets the ETHERNET DMA IT source enabled or disabled.

#define	__HAL_ETH_DMA_GET_IT(__HANDLE__, __INTERRUPT__)
	Gets the ETHERNET DMA IT pending bit.

#define	__HAL_ETH_DMA_CLEAR_IT(__HANDLE__, __INTERRUPT__)
	Clears the ETHERNET DMA IT pending bit.

#define	__HAL_ETH_DMA_GET_FLAG(__HANDLE__, __FLAG__)
	Checks whether the specified ETHERNET DMA flag is set or not.

#define	__HAL_ETH_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
	Clears the specified ETHERNET DMA flag.

#define	__HAL_ETH_MAC_GET_IT(__HANDLE__, __INTERRUPT__)
	Checks whether the specified ETHERNET MAC flag is set or not.

#define	ETH_WAKEUP_EXTI_LINE 0x00080000U

#define	__HAL_ETH_WAKEUP_EXTI_ENABLE_IT(__EXTI_LINE__)
	Enable the ETH WAKEUP Exti Line.

#define	__HAL_ETH_WAKEUP_EXTI_GET_FLAG(__EXTI_LINE__)
	checks whether the specified ETH WAKEUP Exti interrupt flag is set or not.

#define	__HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(__EXTI_LINE__)
	Clear the ETH WAKEUP Exti flag.

#define	__HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE(__EXTI_LINE__)
	enable rising edge interrupt on selected EXTI line.

#define	__HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE(__EXTI_LINE__)
	enable falling edge interrupt on selected EXTI line.

#define	__HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE(__EXTI_LINE__)
	enable falling edge interrupt on selected EXTI line.

#define	__HAL_ETH_WAKEUP_EXTI_GENERATE_SWIT(__EXTI_LINE__)
	Generates a Software interrupt on selected EXTI line.

#define	__HAL_ETH_GET_PTP_CONTROL(__HANDLE__, __FLAG__)

#define	__HAL_ETH_SET_PTP_CONTROL(__HANDLE__, __FLAG__)

Typedefs
typedef struct __ETH_BufferTypeDef	ETH_BufferTypeDef
	ETH Buffers List structure definition.

typedef uint32_t	HAL_ETH_StateTypeDef
	HAL State structures definition.

typedef void(*	pETH_rxAllocateCallbackTypeDef) (uint8_t **buffer)
	HAL ETH Rx Get Buffer Function definition.

typedef void(*	pETH_rxLinkCallbackTypeDef) (void pStart, void pEnd, uint8_t *buff, uint16_t Length)
	HAL ETH Rx Set App Data Function definition.

typedef void(*	pETH_txFreeCallbackTypeDef) (uint32_t *buffer)
	HAL ETH Tx Free Function definition.

typedef void(*	pETH_txPtpCallbackTypeDef) (uint32_t buffer, ETH_TimeStampTypeDef timestamp)
	HAL ETH Tx Free Function definition.

Enumerations
enum	ETH_MediaInterfaceTypeDef { HAL_ETH_MII_MODE = 0x00U , HAL_ETH_RMII_MODE = SYSCFG_PMC_MII_RMII_SEL }
	HAL ETH Media Interfaces enum definition. More...

Functions
HAL_StatusTypeDef	HAL_ETH_Init (ETH_HandleTypeDef *heth)
	Initialize the Ethernet peripheral registers.

HAL_StatusTypeDef	HAL_ETH_DeInit (ETH_HandleTypeDef *heth)
	DeInitializes the ETH peripheral.

void	HAL_ETH_MspInit (ETH_HandleTypeDef *heth)
	Initializes the ETH MSP.

void	HAL_ETH_MspDeInit (ETH_HandleTypeDef *heth)
	DeInitializes ETH MSP.

HAL_StatusTypeDef	HAL_ETH_Start (ETH_HandleTypeDef *heth)
	Enables Ethernet MAC and DMA reception and transmission.

HAL_StatusTypeDef	HAL_ETH_Start_IT (ETH_HandleTypeDef *heth)
	Enables Ethernet MAC and DMA reception/transmission in Interrupt mode.

HAL_StatusTypeDef	HAL_ETH_Stop (ETH_HandleTypeDef *heth)
	Stop Ethernet MAC and DMA reception/transmission.

HAL_StatusTypeDef	HAL_ETH_Stop_IT (ETH_HandleTypeDef *heth)
	Stop Ethernet MAC and DMA reception/transmission in Interrupt mode.

HAL_StatusTypeDef	HAL_ETH_ReadData (ETH_HandleTypeDef heth, void *pAppBuff)
	Read a received packet.

HAL_StatusTypeDef	HAL_ETH_RegisterRxAllocateCallback (ETH_HandleTypeDef *heth, pETH_rxAllocateCallbackTypeDef rxAllocateCallback)
	Register the Rx alloc callback.

HAL_StatusTypeDef	HAL_ETH_UnRegisterRxAllocateCallback (ETH_HandleTypeDef *heth)
	Unregister the Rx alloc callback.

HAL_StatusTypeDef	HAL_ETH_RegisterRxLinkCallback (ETH_HandleTypeDef *heth, pETH_rxLinkCallbackTypeDef rxLinkCallback)
	Set the Rx link data function.

HAL_StatusTypeDef	HAL_ETH_UnRegisterRxLinkCallback (ETH_HandleTypeDef *heth)
	Unregister the Rx link callback.

HAL_StatusTypeDef	HAL_ETH_GetRxDataErrorCode (const ETH_HandleTypeDef heth, uint32_t pErrorCode)
	Get the error state of the last received packet.

HAL_StatusTypeDef	HAL_ETH_RegisterTxFreeCallback (ETH_HandleTypeDef *heth, pETH_txFreeCallbackTypeDef txFreeCallback)
	Set the Tx free function.

HAL_StatusTypeDef	HAL_ETH_UnRegisterTxFreeCallback (ETH_HandleTypeDef *heth)
	Unregister the Tx free callback.

HAL_StatusTypeDef	HAL_ETH_ReleaseTxPacket (ETH_HandleTypeDef *heth)
	Release transmitted Tx packets.

HAL_StatusTypeDef	HAL_ETH_Transmit (ETH_HandleTypeDef heth, ETH_TxPacketConfigTypeDef pTxConfig, uint32_t Timeout)
	Sends an Ethernet Packet in polling mode.

HAL_StatusTypeDef	HAL_ETH_Transmit_IT (ETH_HandleTypeDef heth, ETH_TxPacketConfigTypeDef pTxConfig)
	Sends an Ethernet Packet in interrupt mode.

HAL_StatusTypeDef	HAL_ETH_WritePHYRegister (const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t RegValue)
	Writes to a PHY register.

HAL_StatusTypeDef	HAL_ETH_ReadPHYRegister (ETH_HandleTypeDef heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t pRegValue)
	Read a PHY register.

void	HAL_ETH_IRQHandler (ETH_HandleTypeDef *heth)
	This function handles ETH interrupt request.

void	HAL_ETH_TxCpltCallback (ETH_HandleTypeDef *heth)
	Tx Transfer completed callbacks.

void	HAL_ETH_RxCpltCallback (ETH_HandleTypeDef *heth)
	Rx Transfer completed callbacks.

void	HAL_ETH_ErrorCallback (ETH_HandleTypeDef *heth)
	Ethernet transfer error callbacks.

void	HAL_ETH_PMTCallback (ETH_HandleTypeDef *heth)
	Ethernet Power Management module IT callback.

void	HAL_ETH_WakeUpCallback (ETH_HandleTypeDef *heth)
	ETH WAKEUP interrupt callback.

void	HAL_ETH_RxAllocateCallback (uint8_t **buff)
	Rx Allocate callback.

void	HAL_ETH_RxLinkCallback (void pStart, void pEnd, uint8_t *buff, uint16_t Length)
	Rx Link callback.

void	HAL_ETH_TxFreeCallback (uint32_t *buff)
	Tx Free callback.

void	HAL_ETH_TxPtpCallback (uint32_t buff, ETH_TimeStampTypeDef timestamp)

HAL_StatusTypeDef	HAL_ETH_GetMACConfig (const ETH_HandleTypeDef heth, ETH_MACConfigTypeDef macconf)
	Get the configuration of the MAC and MTL subsystems.

HAL_StatusTypeDef	HAL_ETH_GetDMAConfig (const ETH_HandleTypeDef heth, ETH_DMAConfigTypeDef dmaconf)
	Get the configuration of the DMA.

HAL_StatusTypeDef	HAL_ETH_SetMACConfig (ETH_HandleTypeDef heth, ETH_MACConfigTypeDef macconf)
	Set the MAC configuration.

HAL_StatusTypeDef	HAL_ETH_SetDMAConfig (ETH_HandleTypeDef heth, ETH_DMAConfigTypeDef dmaconf)
	Set the ETH DMA configuration.

void	HAL_ETH_SetMDIOClockRange (ETH_HandleTypeDef *heth)
	Configures the Clock range of ETH MDIO interface.

void	HAL_ETH_SetRxVLANIdentifier (ETH_HandleTypeDef *heth, uint32_t ComparisonBits, uint32_t VLANIdentifier)
	Set the VLAN Identifier for Rx packets.

HAL_StatusTypeDef	HAL_ETH_GetMACFilterConfig (const ETH_HandleTypeDef heth, ETH_MACFilterConfigTypeDef pFilterConfig)
	Get the ETH MAC (L2) Filters configuration.

HAL_StatusTypeDef	HAL_ETH_SetMACFilterConfig (ETH_HandleTypeDef heth, const ETH_MACFilterConfigTypeDef pFilterConfig)
	Set the ETH MAC (L2) Filters configuration.

HAL_StatusTypeDef	HAL_ETH_SetHashTable (ETH_HandleTypeDef heth, uint32_t pHashTable)
	Set the ETH Hash Table Value.

HAL_StatusTypeDef	HAL_ETH_SetSourceMACAddrMatch (const ETH_HandleTypeDef heth, uint32_t AddrNbr, const uint8_t pMACAddr)
	Set the source MAC Address to be matched.

void	HAL_ETH_EnterPowerDownMode (ETH_HandleTypeDef heth, const ETH_PowerDownConfigTypeDef pPowerDownConfig)
	Enters the Power down mode.

void	HAL_ETH_ExitPowerDownMode (ETH_HandleTypeDef *heth)
	Exits from the Power down mode.

HAL_StatusTypeDef	HAL_ETH_SetWakeUpFilter (ETH_HandleTypeDef heth, uint32_t pFilter, uint32_t Count)
	Set the WakeUp filter.

HAL_ETH_StateTypeDef	HAL_ETH_GetState (const ETH_HandleTypeDef *heth)
	Returns the ETH state.

uint32_t	HAL_ETH_GetError (const ETH_HandleTypeDef *heth)
	Returns the ETH error code.

uint32_t	HAL_ETH_GetDMAError (const ETH_HandleTypeDef *heth)
	Returns the ETH DMA error code.

uint32_t	HAL_ETH_GetMACError (const ETH_HandleTypeDef *heth)
	Returns the ETH MAC error code.

uint32_t	HAL_ETH_GetMACWakeUpSource (const ETH_HandleTypeDef *heth)
	Returns the ETH MAC WakeUp event source.

Detailed Description

Header file of ETH HAL module.

Author: MCD Application Team

Attention

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

Definition in file stm32f4xx_hal_eth.h.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description